mirror of https://github.com/VLSIDA/OpenRAM.git
route supplies + fix replica col dummy
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@ -28,7 +28,7 @@ class sky130_replica_column(sky130_bitcell_base_array):
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# Row size is the number of rows with word lines
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self.row_size = sum(rbl) + rows
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# Start of regular word line rows
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self.row_start = rbl[0] + 1
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self.row_start = rbl[0]
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# End of regular word line rows
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self.row_end = self.row_start + rows
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super().__init__(rows=self.row_size, cols=1, column_offset=column_offset, name=name)
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@ -63,7 +63,7 @@ class sky130_replica_column(sky130_bitcell_base_array):
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self.place_array()
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self.add_layout_pins()
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self.route_supplies()
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self.add_boundary()
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self.DRC_LVS()
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