Unrotate vias in delay chain

This commit is contained in:
Matt Guthaus
2018-08-29 17:21:53 -07:00
parent 5a065cf701
commit 93a6247f26
+2 -2
View File
@@ -186,7 +186,7 @@ class delay_chain(design.design):
continue
for pin_name in ["vdd", "gnd"]:
pin = load.get_pin(pin_name)
self.add_power_pin(pin_name, pin.rc(),rotate=0)
self.add_power_pin(pin_name, pin.rc())
else:
# We have an even number of rows, so need to get the last gnd rail
inv = self.driver_inst_list[-1]
@@ -195,7 +195,7 @@ class delay_chain(design.design):
continue
pin_name = "gnd"
pin = load.get_pin(pin_name)
self.add_power_pin(pin_name, pin.rc(),rotate=0)
self.add_power_pin(pin_name, pin.rc())
# input is A pin of first inverter