From 93a6247f26b534bd6a97b3b784edc2bd462c8c2f Mon Sep 17 00:00:00 2001 From: Matt Guthaus Date: Wed, 29 Aug 2018 17:21:53 -0700 Subject: [PATCH] Unrotate vias in delay chain --- compiler/modules/delay_chain.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/compiler/modules/delay_chain.py b/compiler/modules/delay_chain.py index ff9878fb..b8a57f15 100644 --- a/compiler/modules/delay_chain.py +++ b/compiler/modules/delay_chain.py @@ -186,7 +186,7 @@ class delay_chain(design.design): continue for pin_name in ["vdd", "gnd"]: pin = load.get_pin(pin_name) - self.add_power_pin(pin_name, pin.rc(),rotate=0) + self.add_power_pin(pin_name, pin.rc()) else: # We have an even number of rows, so need to get the last gnd rail inv = self.driver_inst_list[-1] @@ -195,7 +195,7 @@ class delay_chain(design.design): continue pin_name = "gnd" pin = load.get_pin(pin_name) - self.add_power_pin(pin_name, pin.rc(),rotate=0) + self.add_power_pin(pin_name, pin.rc()) # input is A pin of first inverter