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Made parasitic delay parameter in Freepdk45 more accurate, added stage names to delay model.

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Hunter Nichols
2018-12-17 23:32:02 -08:00
parent 51b1bd46da
commit 8eb4812e16
5 changed files with 15 additions and 8 deletions
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technology/freepdk45/tech/tech.py
+1 -1
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@@ -333,7 +333,7 @@ parameter["static_delay_stages"] = 4
parameter["static_fanout_per_stage"] = 3
parameter["dff_clk_cin"] = 30.6 #relative capacitance
parameter["6tcell_wl_cin"] = 3 #relative capacitance
parameter["min_inv_para_delay"] = .5 #Tau delay units
parameter["min_inv_para_delay"] = 2.4 #Tau delay units
parameter["sa_en_pmos_size"] = .72 #micro-meters
parameter["sa_en_nmos_size"] = .27 #micro-meters
parameter["rbl_height_percentage"] = .5 #Height of RBL compared to bitcell array