luke/OpenRAM
1
0
Fork 0
mirror of https://github.com/VLSIDA/OpenRAM.git synced 2026-08-30 01:48:33 +02:00
Code Issues Packages Projects Releases Wiki Activity

fixed decode lvs

Browse Source
This commit is contained in:
Jacob Walker
2023-03-30 11:30:50 -07:00
parent 16df8e0e43
commit 81bf2d7ae7
4 changed files with 19 additions and 17 deletions
Download Patch File Download Diff File Expand all files Collapse all files
compiler/modules/rom_wordline_driver_array.py
+8 -4
View File
@@ -86,11 +86,13 @@ class rom_wordline_driver_array(design):
Add a pin for each row of vdd/gnd which
are must-connects next level up.
"""
if layer_props.wordline_driver.vertical_supply:
self.route_vertical_pins("vdd", self.wld_inst)
self.route_vertical_pins("gnd", self.wld_inst)
self.route_vertical_pins("vdd", self.wld_inst, layer=self.supply_layer)
self.route_vertical_pins("gnd", self.wld_inst, layer=self.supply_layer)
print("copied")
# self.route_vertical_pins("vdd", self.wld_inst)
# self.route_vertical_pins("gnd", self.wld_inst)
self.route_vertical_pins("vdd", [self], layer=self.supply_layer)
self.route_vertical_pins("gnd", [self], layer=self.supply_layer)
else:
self.route_vertical_pins("vdd", self.wld_inst, xside="rx",)
self.route_vertical_pins("gnd", self.wld_inst, xside="lx",)
@@ -123,6 +125,8 @@ class rom_wordline_driver_array(design):
route_width = drc["minwidth_{}".format(self.route_layer)]
for row in range(self.rows):
inst = self.wld_inst[row]
self.copy_layout_pin(inst, "vdd")
self.copy_layout_pin(inst, "gnd")
self.copy_layout_pin(inst, "A", "in_{0}".format(row))