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synced 2026-08-30 01:48:33 +02:00
fixed decode lvs
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@@ -120,7 +120,7 @@ class rom_base_array(bitcell_base_array):
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self.add_pin(bl_name, "OUTPUT")
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for wl_name in self.get_wordline_names():
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self.add_pin(wl_name, "INPUT")
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self.add_pin("precharge_gate", "INPUT")
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self.add_pin("precharge", "INPUT")
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self.add_pin("vdd", "POWER")
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self.add_pin("gnd", "GROUND")
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@@ -207,7 +207,7 @@ class rom_base_array(bitcell_base_array):
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# if self.int_bl_list[bl] == prechrg_pins[bl]:
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# prechrg_pins[bl] = "gnd"
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prechrg_pins.append("precharge_gate")
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prechrg_pins.append("precharge")
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prechrg_pins.append("vdd")
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self.precharge_inst = self.add_inst(name="decode_array_precharge", mod=self.precharge_array)
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self.connect_inst(prechrg_pins)
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