added binning to precharge pmos

This commit is contained in:
SWalker 2023-02-02 12:46:07 -08:00 committed by Jacob Walker
parent 6981cfa58b
commit 764601a721
2 changed files with 5 additions and 1 deletions

View File

@ -7,6 +7,7 @@
# #
from .rom_base_cell import rom_base_cell from .rom_base_cell import rom_base_cell
from .pgate import pgate
from openram.base import vector from openram.base import vector
from openram import OPTS from openram import OPTS
from openram.sram_factory import factory from openram.sram_factory import factory
@ -30,10 +31,11 @@ class rom_precharge_cell(rom_base_cell):
def add_modules(self): def add_modules(self):
width = pgate.nearest_bin("pmos", drc["minwidth_tx"])
self.pmos = factory.create(module_type="ptx", self.pmos = factory.create(module_type="ptx",
module_name="pre_pmos_mod", module_name="pre_pmos_mod",
tx_type="pmos", tx_type="pmos",
width=width,
add_source_contact=self.supply_layer, add_source_contact=self.supply_layer,
add_drain_contact=self.bitline_layer add_drain_contact=self.bitline_layer
) )

View File

@ -29,6 +29,8 @@ class rom_array_test(openram_test):
a = factory.create(module_type="rom_base_array", cols=9, rows=8, bitmap=data, strap_spacing=4, pitch_match=True) a = factory.create(module_type="rom_base_array", cols=9, rows=8, bitmap=data, strap_spacing=4, pitch_match=True)
self.local_check(a) self.local_check(a)
a.sp_write(OPTS.openram_temp + 'simulation_file.sp')
openram.end_openram() openram.end_openram()
# run the test from the command line # run the test from the command line