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merge in dev
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@@ -1089,7 +1089,7 @@ class bank(design.design):
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"""
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Gets the spice name of the target bitcell.
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"""
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return self.bitcell_array_inst.mod.get_cell_name(inst_name + '.x' + self.bitcell_array_inst.name,
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return self.bitcell_array_inst.mod.get_cell_name(inst_name + "{}x".format(OPTS.hier_seperator) + self.bitcell_array_inst.name,
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row,
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col)
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@@ -121,4 +121,4 @@ class bitcell_array(bitcell_base_array):
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def get_cell_name(self, inst_name, row, col):
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"""Gets the spice name of the target bitcell."""
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return inst_name + '.x' + self.cell_inst[row, col].name, self.cell_inst[row, col]
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return inst_name + "{}x".format(OPTS.hier_seperator) + self.cell_inst[row, col].name, self.cell_inst[row, col]
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@@ -330,7 +330,7 @@ class global_bitcell_array(bitcell_base_array.bitcell_base_array):
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# We must also translate the global array column number to the local array column number
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local_col = col - self.col_offsets[i - 1]
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return local_array.get_cell_name(inst_name + '.x' + local_inst.name, row, local_col)
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return local_array.get_cell_name(inst_name + "{}x".format(OPTS.hier_seperator) + local_inst.name, row, local_col)
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def clear_exclude_bits(self):
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"""
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@@ -295,7 +295,7 @@ class local_bitcell_array(bitcell_base_array.bitcell_base_array):
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def get_cell_name(self, inst_name, row, col):
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"""Gets the spice name of the target bitcell."""
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return self.bitcell_array.get_cell_name(inst_name + '.x' + self.bitcell_array_inst.name, row, col)
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return self.bitcell_array.get_cell_name(inst_name + "{}x".format(OPTS.hier_seperator) + self.bitcell_array_inst.name, row, col)
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def clear_exclude_bits(self):
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"""
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@@ -114,4 +114,4 @@ class bitcell_array(bitcell_base_array):
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def get_cell_name(self, inst_name, row, col):
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"""Gets the spice name of the target bitcell."""
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return inst_name + '.x' + self.cell_inst[row, col].name, self.cell_inst[row, col]
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return inst_name + "{}x".format(OPTS.hier_seperator) + self.cell_inst[row, col].name, self.cell_inst[row, col]
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@@ -553,7 +553,7 @@ class replica_bitcell_array(bitcell_base_array):
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"""
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Gets the spice name of the target bitcell.
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"""
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return self.bitcell_array.get_cell_name(inst_name + '.x' + self.bitcell_array_inst.name, row, col)
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return self.bitcell_array.get_cell_name(inst_name + "{}x".format(OPTS.hier_seperator) + self.bitcell_array_inst.name, row, col)
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def clear_exclude_bits(self):
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"""
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