bank: Connect instances by their individual bl/br names

each module should be able to state how their bl/br lines are named. Here we
always connect port_data with the bitcell_array, so port_data needs function
that return the names of bl/br.

Signed-off-by: Bastian Koppelmann <[email protected]>

compiler/pgates/precharge.py

@@ -38,6 +38,12 @@ class precharge(design.design):
             self.create_layout()
             self.DRC_LVS()
 
+    def get_bl_names(self):
+        return "bl"
+
+    def get_br_names(self):
+        return "br"
+
     def create_netlist(self):
         self.add_pins()
         self.add_ptx()