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Removed comments for rw pen() and added a wmask func test.

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jsowash
2019-07-25 12:24:27 -07:00
parent c8bbee884b
commit 61ba23706c
4 changed files with 80 additions and 44 deletions
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compiler/characterizer/functional.py
+3 -3
View File
@@ -30,7 +30,7 @@ class functional(simulation):
# Seed the characterizer with a constant seed for unit tests
if OPTS.is_unit_test:
random.seed(12345)
random.seed(687234)
if self.write_size is not None:
self.num_wmasks = int(self.word_size / self.write_size)
@@ -149,7 +149,7 @@ class functional(simulation):
wmask = self.gen_wmask()
new_word = word
for bit in range(len(wmask)):
# Remove the bits of the word that's been written to
# AWhen the write mask's bits are 0, the old data values should appear in the new word
if wmask[bit] == "0":
lower = bit * self.write_size
upper = lower + self.write_size - 1
@@ -170,7 +170,7 @@ class functional(simulation):
if addr in w_addrs:
self.add_noop_one_port("0"*self.addr_size, "0"*self.word_size, "0"*self.num_wmasks, port)
else:
# comment = self.gen_cycle_comment("read", word, addr, self.wmask, port, self.t_current)
comment = self.gen_cycle_comment("read", word, addr, self.wmask, port, self.t_current)
self.add_read_one_port(comment, addr, rw_read_din_data, "1"*self.num_wmasks, port)
self.write_check.append([word, "{0}{1}".format(self.dout_name,port), self.t_current+self.period, check])
check += 1
compiler/characterizer/simulation.py
+3 -17
View File
@@ -215,21 +215,6 @@ class simulation():
self.add_data(data,port)
self.add_address(address,port)
self.add_wmask(wmask,port)
#
# def add_partial_write_one_port(self, comment, address, data, wmask, port):
# """ Add the control values for a write cycle (partial). Does not increment the period. """
# debug.check(port in self.write_ports,
# "Cannot add write cycle to a read port. Port {0}, Write Ports {1}".format(port,
# self.write_ports))
# debug.info(2, comment)
# self.fn_cycle_comments.append(comment)
#
# self.add_control_one_port(port, "write")
# self.add_data(data, port)
# self.add_address(address, port)
# self.add_wmask(wmask,port)
def add_read_one_port(self, comment, address, din_data, wmask, port):
""" Add the control values for a read cycle. Does not increment the period. """
@@ -320,8 +305,9 @@ class simulation():
pin_names.append("{0}{1}".format(tech.spice["clk"], port))
if self.write_size is not None:
for bit in range(self.num_wmasks):
pin_names.append("WMASK{0}_{1}".format(port,bit))
for port in write_index:
for bit in range(self.num_wmasks):
pin_names.append("WMASK{0}_{1}".format(port,bit))
for read_output in read_index:
for i in range(dbits):