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Change tx mux size back to 8. Document why it was chosen.

This commit is contained in:
Matt Guthaus 2018-11-07 16:03:48 -08:00
parent 3d2abc0873
commit 5dfba21acc
1 changed files with 3 additions and 3 deletions
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6
compiler/pgates/single_level_column_mux.py
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@ -10,20 +10,20 @@ class single_level_column_mux(design.design):
""" """
This module implements the columnmux bitline cell used in the design. This module implements the columnmux bitline cell used in the design.
Creates a single columnmux cell with the given integer size relative Creates a single columnmux cell with the given integer size relative
to minimum size. Default is 2x. to minimum size. Default is 8x. Per Samira and Hodges-Jackson book:
Column-mux transistors driven by the decoder must be sized for optimal speed
""" """
# This is needed for different bitline spacings # This is needed for different bitline spacings
unique_id = 1 unique_id = 1
def __init__(self, tx_size=2, bitcell_bl="bl", bitcell_br="br"): def __init__(self, tx_size=8, bitcell_bl="bl", bitcell_br="br"):
self.tx_size = int(tx_size) self.tx_size = int(tx_size)
name="single_level_column_mux_{}_{}".format(self.tx_size,single_level_column_mux.unique_id) name="single_level_column_mux_{}_{}".format(self.tx_size,single_level_column_mux.unique_id)
single_level_column_mux.unique_id += 1 single_level_column_mux.unique_id += 1
design.design.__init__(self, name) design.design.__init__(self, name)
debug.info(2, "create single column mux cell: {0}".format(name)) debug.info(2, "create single column mux cell: {0}".format(name))
self.tx_size = tx_size
self.bitcell_bl = bitcell_bl self.bitcell_bl = bitcell_bl
self.bitcell_br = bitcell_br self.bitcell_br = bitcell_br