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fix col_cap array for dummu compatability ...bitcells next
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@@ -176,9 +176,6 @@ class pattern():
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self.parent_design.all_inst[row, col] = self.parent_design.add_existing_inst(inst,self.name_template.format(row, col))
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self.parent_design.connect_inst(self.parent_design.get_strap_pins(self.bit_rows[col], self.bit_cols[row]))
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def print_bit_blocck():
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return
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def place_inst(self, inst, offset) -> None:
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x = offset[0]
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y = offset[1]
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