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Fix offsets for local bitcell arrays.
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@@ -159,18 +159,20 @@ class local_bitcell_array(bitcell_base_array.bitcell_base_array):
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def place(self):
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""" Place the bitcelll array to the right of the wl driver. """
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# FIXME: Replace this with a tech specific paramter
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# FIXME: Replace this with a tech specific parameter
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driver_to_array_spacing = 3 * self.m3_pitch
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self.wl_insts[0].place(vector(0,
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self.bitcell_array.get_replica_bottom() + self.cell.height))
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wl_offset = vector(0, self.bitcell_array.get_replica_bottom())
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self.wl_insts[0].place(wl_offset)
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self.bitcell_array_inst.place(vector(self.wl_insts[0].rx() + driver_to_array_spacing,
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0))
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bitcell_array_offset = vector(self.wl_insts[0].rx() + driver_to_array_spacing, 0)
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self.bitcell_array_inst.place(bitcell_array_offset)
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if len(self.all_ports) > 1:
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self.wl_insts[1].place(vector(self.bitcell_array_inst.rx() + self.wl_array.width + driver_to_array_spacing,
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self.bitcell_array.get_replica_top() + self.cell.height),
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wl_offset = vector(self.bitcell_array_inst.rx() + self.wl_array.width + driver_to_array_spacing,
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self.bitcell_array.get_replica_bottom() + self.wl_array.height + self.cell.height)
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self.wl_insts[1].place(wl_offset,
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mirror="XY")
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self.height = self.bitcell_array.height
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