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Bug fix
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@@ -113,5 +113,5 @@ class row_cap_array(bitcell_base_array):
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inst = self.cell_inst[row, col]
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for pin_name in ["vdd", "gnd"]:
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for pin in inst.get_pins(pin_name):
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self.add_power_pin(pin)
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self.copy_power_pin(pin)
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