Bug fix

2021-01-13 13:56:22 -08:00 · 2021-01-13 13:56:22 -08:00 · 3ef56a29ea
parent 1b31afd773
commit 3ef56a29ea
1 changed files with 1 additions and 1 deletions
--- a/compiler/modules/row_cap_array.py
+++ b/compiler/modules/row_cap_array.py
@ -113,5 +113,5 @@ class row_cap_array(bitcell_base_array):
                inst = self.cell_inst[row, col]
                for pin_name in ["vdd", "gnd"]:
                    for pin in inst.get_pins(pin_name):
-                        self.add_power_pin(pin)
+                        self.copy_power_pin(pin)