From 3ef56a29ea370741b931875e8254b7c40b8f058a Mon Sep 17 00:00:00 2001 From: mrg Date: Wed, 13 Jan 2021 13:56:22 -0800 Subject: [PATCH] Bug fix --- compiler/modules/row_cap_array.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/compiler/modules/row_cap_array.py b/compiler/modules/row_cap_array.py index 59da5fc2..04845ad5 100644 --- a/compiler/modules/row_cap_array.py +++ b/compiler/modules/row_cap_array.py @@ -113,5 +113,5 @@ class row_cap_array(bitcell_base_array): inst = self.cell_inst[row, col] for pin_name in ["vdd", "gnd"]: for pin in inst.get_pins(pin_name): - self.add_power_pin(pin) + self.copy_power_pin(pin)