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Add new DFF. Create DFF module. Start dff_array, not tested.
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@@ -0,0 +1,29 @@
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import globals
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import design
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from math import log
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import design
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from tech import GDS,layer
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import utils
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class dff(design.design):
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"""
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Memory address flip-flop
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"""
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pin_names = ["d", "clk", "q", "vdd", "gnd"]
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(width,height) = utils.get_libcell_size("dff", GDS["unit"], layer["boundary"])
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pin_map = utils.get_libcell_pins(pin_names, "dff", GDS["unit"], layer["boundary"])
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def __init__(self, name="dff"):
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design.design.__init__(self, name)
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self.width = dff.width
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self.height = dff.height
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self.pin_map = dff.pin_map
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def analytical_delay(self, slew, load = 0.0):
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# dont know how to calculate this now, use constant in tech file
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from tech import spice
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result = self.return_delay(spice["dff_delay"], spice["dff_slew"])
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return result
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@@ -0,0 +1,138 @@
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import debug
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import design
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from tech import drc
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from math import log
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from vector import vector
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from globals import OPTS
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class dff_array(design.design):
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"""
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This is a simple row (or multiple rows) of flops.
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Unlike the data flops, these are never spaced out.
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"""
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def __init__(self, rows, columns, name=""):
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self.rows = rows
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self.columns = columns
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if name=="":
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name = "dff_array_c{0}_w{1}".format(columns,word_size)
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design.design.__init__(self, name)
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debug.info(1, "Creating {}".format(self.name))
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c = reload(__import__(OPTS.dff))
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self.mod_dff = getattr(c, OPTS.dff)
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self.ms = self.mod_dff("dff")
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self.add_mod(self.ms)
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self.width = self.columns * self.ms.width
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self.height = self.rows * self.ms.height
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self.create_layout()
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def create_layout(self):
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self.add_pins()
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self.create_dff_array()
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self.add_layout_pins()
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self.DRC_LVS()
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def add_pins(self):
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for row in range(self.rows):
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for col in range(self.columns):
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self.add_pin("din[{0}][{1}]".format(row,col))
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for row in range(self.rows):
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for col in range(self.columns):
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self.add_pin("dout[{0}][{1}]".format(row,col))
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#self.add_pin("dout_bar[{0}]".format(i))
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self.add_pin("clk")
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self.add_pin("vdd")
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self.add_pin("gnd")
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def create_dff_array(self):
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self.ms_inst={}
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for row in range(self.rows):
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for col in range(self.columns):
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name = "Xdff_r{0}_c{1}".format(row,col)
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if (row % 2 == 0):
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base = vector(i*self.ms.width,0)
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mirror = "R0"
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else:
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base = vector((i+1)*self.ms.width,0)
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mirror = "MY"
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self.ms_inst[row,col]=self.add_inst(name=name,
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mod=self.ms,
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offset=base,
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mirror=mirror)
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self.connect_inst(["din[{0}][{1}]".format(row,col),
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"dout[{0}][{1}]".format(row,col),
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"clk",
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"vdd",
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"gnd"])
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def add_layout_pins(self):
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for i in range(self.word_size):
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for gnd_pin in self.ms_inst[i].get_pins("gnd"):
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if gnd_pin.layer!="metal2":
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continue
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self.add_layout_pin(text="gnd",
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layer="metal2",
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offset=gnd_pin.ll(),
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width=gnd_pin.width(),
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height=gnd_pin.height())
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din_pins = self.ms_inst[i].get_pins("din")
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for din_pin in din_pins:
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self.add_layout_pin(text="din[{}]".format(i),
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layer=din_pin.layer,
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offset=din_pin.ll(),
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width=din_pin.width(),
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height=din_pin.height())
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dout_pin = self.ms_inst[i].get_pin("dout")
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self.add_layout_pin(text="dout[{}]".format(i),
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layer="metal2",
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offset=dout_pin.ll(),
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width=dout_pin.width(),
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height=dout_pin.height())
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doutbar_pin = self.ms_inst[i].get_pin("dout_bar")
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self.add_layout_pin(text="dout_bar[{}]".format(i),
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layer="metal2",
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offset=doutbar_pin.ll(),
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width=doutbar_pin.width(),
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height=doutbar_pin.height())
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# Continous clk rail along with label.
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self.add_layout_pin(text="clk",
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layer="metal1",
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offset=self.ms_inst[0].get_pin("clk").ll().scale(0,1),
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width=self.width,
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height=drc["minwidth_metal1"])
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# Continous vdd rail along with label.
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for vdd_pin in self.ms_inst[i].get_pins("vdd"):
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if vdd_pin.layer!="metal1":
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continue
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self.add_layout_pin(text="vdd",
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layer="metal1",
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offset=vdd_pin.ll().scale(0,1),
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width=self.width,
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height=drc["minwidth_metal1"])
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# Continous gnd rail along with label.
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for gnd_pin in self.ms_inst[i].get_pins("gnd"):
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if gnd_pin.layer!="metal1":
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continue
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self.add_layout_pin(text="gnd",
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layer="metal1",
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offset=gnd_pin.ll().scale(0,1),
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width=self.width,
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height=drc["minwidth_metal1"])
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def analytical_delay(self, slew, load=0.0):
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return self.ms.analytical_delay(slew=slew, load=load)
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