mirror of https://github.com/VLSIDA/OpenRAM.git
14 lines
440 B
SourcePawn
14 lines
440 B
SourcePawn
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*********************** "cell_6t" ******************************
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.SUBCKT cell_6t bl br wl vdd gnd
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* SPICE3 file created from cell_6t.ext - technology: scmos
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M1000 a_36_40# a_28_32# vdd vdd p w=0.6u l=0.8u
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M1001 vdd a_36_40# a_28_32# vdd p w=0.6u l=0.8u
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M1002 a_36_40# a_28_32# gnd gnd n w=1.6u l=0.4u
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M1003 gnd a_36_40# a_28_32# gnd n w=1.6u l=0.4u
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M1004 a_36_40# wl bl gnd n w=0.8u l=0.4u
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M1005 a_28_32# wl br gnd n w=0.8u l=0.4u
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.ENDS
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