The simulation library allows you to explore different designs and understand the simulation setups, which will be covered in detail throughout the course. To get started, try opening dc_lv_nmos by selecting the instance and pressing e. This will open the schematic view.
From here, navigate to the "netlist" button in the top-right corner, then press "simulate." Your first schematic simulation in Xschem will now be complete. View the results by left-clicking the green arrow while holding down Ctrl. The output should look like this:
In order to test if K-layout is working properly, the following line can be executed anywhere
```
klayout -e
```
This will launch klayout in edit mode. After this navigate to File -> New Layout. A small box will apear with the following input sections
- Technology
- Top cell
- Database unit
- Initial window size
- Initial layers(s)
Kepp all seetings default except for the technology box, where "sg13g2 - IHP SiGe 130nm technology" should be avaliable and chosen. After this press Ok. From here navigate to the toolmanger and select Instance. When this is done you the left pane should show the selected instance in the SG13 development Pcells library. If the Sg13 dev library isnt avaliable, you should close the program and ensure that you have included the submodules in the git pull, i.e
Analog design requires a solid foundation in analog electronics to ensure high-performance and robust designs. In this course, all circuits have been designed with the gm/Id methodology rather than traditional small-signal calculations using square-law models. This method uses model parameters to generate lookup tables, enabling a more data-driven approach to design. If you're interested in understanding the circuit design procedures in greater detail, each module includes Jupyter Notebook scripts as references for a more advanced IC design approach using open-source tools.
In the repository, under the module_0 folder, you’ll find a directory called gmid. This directory is based on the repository from Medwatt, which can be accessed at the following link:
Modifications have been made to the Lookup Table (LUT) generator class to ensure compatibility with the IHP Open PDK. As a result, you can easily generate gm/Id LUTs by running:
This will open a simple terminal-based GUI, allowing you to select which transistor you would like to generate the gm/Id LUT for. You just need to specify the sweeping parameters, and the tool will parse a netlist to Ngspice. The generated LUTs will be saved in a folder named LUTs. From here, you can navigate to the scripting folder and open JupyterLab, where an implemented GUI for viewing the data has been created. NOTE: The LUT data is not provided in the repository since the datasets are quite large. You can refer to the slides over module_1 to see a more graphic explination on how to generate the LUTs.