luke
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  • Joined on 2024-06-02
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luke synced commits to refs/pull/1190/merge at luke/iverilog from mirror 2025-07-01 10:07:11 +02:00
1c0ee096b0 Merge a1ac28d38b33dba41590cc7fade06eacb4c7e2a7 into a05da1ca082dfca031232ddb845be0b917171ed6
a05da1ca08 Only synth when the R-value is valid
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luke synced commits to master at luke/verilator from mirror 2025-07-01 09:56:44 +02:00
cd0f35fe67 Fix recursive module assertion, broken recent lib commit (#5891 partial fix)
luke synced commits to refs/pull/5990/merge at luke/verilator from mirror 2025-07-01 09:56:44 +02:00
4dabc85954 Merge 208114dcede9112c28afd2d5d48681aa5c5633aa into cd0f35fe6773e8e3286d961a7b9b4be3c6cfe7e5
cd0f35fe67 Fix recursive module assertion, broken recent lib commit (#5891 partial fix)
d455ec6229 Fix `specparam` PATHPULSE broken recent commit (#6142).
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luke synced commits to refs/pull/6133/merge at luke/verilator from mirror 2025-07-01 09:56:44 +02:00
0d56909609 Merge 7260711d6bf1681b155ebc75ce55d566ba495a24 into d455ec6229e638827d007b8701b62b24761d214c
d455ec6229 Fix `specparam` PATHPULSE broken recent commit (#6142).
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luke synced commits to refs/pull/6135/merge at luke/verilator from mirror 2025-07-01 09:56:44 +02:00
ff4ae6cecb Merge 8606ff3fb1db6d4d6bdaf5272d363e26a836bf61 into d455ec6229e638827d007b8701b62b24761d214c
d455ec6229 Fix `specparam` PATHPULSE broken recent commit (#6142).
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luke synced commits to refs/pull/6141/merge at luke/verilator from mirror 2025-07-01 09:56:44 +02:00
38424835d1 Merge d8f23af443ba356e7aa66c0086f4f48a92c30e74 into cd0f35fe6773e8e3286d961a7b9b4be3c6cfe7e5
cd0f35fe67 Fix recursive module assertion, broken recent lib commit (#5891 partial fix)
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luke synced commits to refs/pull/8170/head at luke/sbt from mirror 2025-07-01 09:46:43 +02:00
2e415d4c3d Fix test
luke synced commits to refs/pull/8170/merge at luke/sbt from mirror 2025-07-01 09:46:43 +02:00
bd355de12e Merge 2e415d4c3dc4bdaef23b612e1ccdd5ee9300b62b into c3baa5566840a955e793ed5cc6d3135db8584269
2e415d4c3d Fix test
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luke synced commits to master at luke/iverilog from mirror 2025-07-01 01:57:13 +02:00
a05da1ca08 Only synth when the R-value is valid
luke synced commits to gh-pages at luke/iverilog from mirror 2025-07-01 01:57:13 +02:00
94341b560a Deploy to GitHub pages
luke synced commits to gh-pages at luke/openFPGALoader from mirror 2025-07-01 01:57:08 +02:00
473518e1d7 update b06220f71f668012af249653fce361d8b12af182
luke synced commits to master at luke/openFPGALoader from mirror 2025-07-01 01:57:08 +02:00
b06220f71f spiOverJtag/build.py: added default value for model variable
b2aa12b582 spiFlash, spiFlashdb: added global_lock flag and uses it instead of jedec_id (#566)
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luke synced commits to refs/pull/4437/merge at luke/yosys from mirror 2025-07-01 01:56:45 +02:00
3566bf8481 Merge 260cc42c2f635bafcff3e5aa574528759db52096 into 7b0c1fe491fd0c90b8b513a89cf033406c620185
7b0c1fe491 Merge pull request #5102 from YosysHQ/krys/verilog_no_select
54013c6da7 Merge pull request #5162 from YosysHQ/micko/attrmap
beaca05b40 Include boxes in attrmap
784de0f6e3 Make attrmap able to alter memory attributes as well
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luke synced commits to refs/pull/4589/merge at luke/yosys from mirror 2025-07-01 01:56:45 +02:00
7b1c7f5a6d Merge c1228fec236c82c9cd46b194c9af062143da19c4 into 7b0c1fe491fd0c90b8b513a89cf033406c620185
7b0c1fe491 Merge pull request #5102 from YosysHQ/krys/verilog_no_select
54013c6da7 Merge pull request #5162 from YosysHQ/micko/attrmap
beaca05b40 Include boxes in attrmap
784de0f6e3 Make attrmap able to alter memory attributes as well
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luke synced commits to refs/pull/4782/merge at luke/yosys from mirror 2025-07-01 01:56:45 +02:00
4d72e5ee4d Merge 0a15a23e8fc2d9c31673005c06b8e205bcdbbb5c into 7b0c1fe491fd0c90b8b513a89cf033406c620185
7b0c1fe491 Merge pull request #5102 from YosysHQ/krys/verilog_no_select
547382504b Update verilog_frontend.cc
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luke synced commits to refs/pull/4929/merge at luke/yosys from mirror 2025-07-01 01:56:45 +02:00
0ddb3be4a3 Merge af3f9d83185c33b15522ebf0b774c55dcf13f73e into 7b0c1fe491fd0c90b8b513a89cf033406c620185
7b0c1fe491 Merge pull request #5102 from YosysHQ/krys/verilog_no_select
547382504b Update verilog_frontend.cc
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luke synced commits to refs/pull/4930/merge at luke/yosys from mirror 2025-07-01 01:56:45 +02:00
dcc49f5bc1 Merge 913ac04764dfdeebc9f965e4cae889098062faf6 into 7b0c1fe491fd0c90b8b513a89cf033406c620185
7b0c1fe491 Merge pull request #5102 from YosysHQ/krys/verilog_no_select
547382504b Update verilog_frontend.cc
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luke synced commits to refs/pull/5004/merge at luke/yosys from mirror 2025-07-01 01:56:45 +02:00
eb2ceb744d Merge 532f9abc72107d74d148cbf3a643957ab86d083b into 7b0c1fe491fd0c90b8b513a89cf033406c620185
7b0c1fe491 Merge pull request #5102 from YosysHQ/krys/verilog_no_select
547382504b Update verilog_frontend.cc
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luke synced commits to refs/pull/4044/merge at luke/yosys from mirror 2025-07-01 01:56:44 +02:00
57b82ecfdc Merge 6b5fbe37f054e85c483f226f6c6c3dde610ed25b into 7b0c1fe491fd0c90b8b513a89cf033406c620185
7b0c1fe491 Merge pull request #5102 from YosysHQ/krys/verilog_no_select
547382504b Update verilog_frontend.cc
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luke synced commits to refs/pull/4252/merge at luke/yosys from mirror 2025-07-01 01:56:44 +02:00
7992c917f0 Merge 36c244aeda859731fefa5dd62659e7d2f7f5ebf4 into 7b0c1fe491fd0c90b8b513a89cf033406c620185
7b0c1fe491 Merge pull request #5102 from YosysHQ/krys/verilog_no_select
54013c6da7 Merge pull request #5162 from YosysHQ/micko/attrmap
beaca05b40 Include boxes in attrmap
784de0f6e3 Make attrmap able to alter memory attributes as well
Compare 6 commits »