• Joined on 2024-06-02
luke synced and deleted reference refs/tags/emil/abc-fix-deferred-logs at luke/yosys from mirror 2026-04-20 15:37:36 +02:00
luke synced and deleted reference refs/tags/refs/pull/5811/merge at luke/yosys from mirror 2026-04-20 15:37:36 +02:00
luke synced commits to refs/heads/refs/pull/472/merge at luke/magic from mirror 2026-04-20 15:37:32 +02:00
d2652ff45b Merge 8a47a8ac58a63aa36c7320db701cb534aa2efd02 into d157eea7f3c397271a0b6d1e5a98b06101284a13
d157eea7f3 Fixed an error that was discovered with the drcCanonicalMaxwidth()
67c6ed9395 Corrected the handling of toolkit callbacks created by the
f15f0dabbb Added HTML documentation for the "macro" command, after finding that
ae6d26578e Fixed issues with the "macro" command that have existed since the
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luke synced new reference refs/heads/gatecat/xilinx-lut-thru to luke/nextpnr from mirror 2026-04-20 15:37:25 +02:00
luke synced commits to refs/heads/main at luke/nextpnr from mirror 2026-04-20 15:37:25 +02:00
2a84cc9c55 xilinx: Add LUT route-thru pips (#1703)
68978f076f router2: Also write congestion-per-net in heatmap mode
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luke synced commits to refs/heads/refs/pull/1495/merge at luke/nextpnr from mirror 2026-04-20 15:37:25 +02:00
2cbdf436e1 Merge de38bd34fb7ae08880096163264b693fca5a3b5b into 68978f076fd92f4bfc5ea7cfc2ede5fbe4c56b2a
68978f076f router2: Also write congestion-per-net in heatmap mode
33e1c9033b Improve file open error messages (#1700)
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luke synced commits to refs/heads/refs/pull/1612/merge at luke/nextpnr from mirror 2026-04-20 15:37:25 +02:00
f0cef75ebd Merge 1178707d7078eac4eadd89afa2b505bc237168f0 into 2a84cc9c55dd28d68fa2e61bd0ad75226a2cc3f6
2a84cc9c55 xilinx: Add LUT route-thru pips (#1703)
68978f076f router2: Also write congestion-per-net in heatmap mode
33e1c9033b Improve file open error messages (#1700)
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luke synced commits to refs/heads/gatecat/xilinx-lut-thru at luke/nextpnr from mirror 2026-04-20 15:37:25 +02:00
luke synced commits to refs/heads/refs/pull/272/merge at luke/OpenRAM from mirror 2026-04-20 15:37:15 +02:00
37d520befb Merge 21868f9de7357c0ff70189cd701cf56dd5e825ee into f2db9fe2dec85894b2145d5b0a559ca0921629f5
f2db9fe2de Merge pull request #291 from goobber-gawber/modernize2
5cd43442b8 compiler: gdsMill: Modernize codebase.
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luke synced commits to refs/heads/refs/pull/469/merge at luke/iverilog from mirror 2026-04-20 15:07:23 +02:00
66088afe63 Merge b7f7e92535f8f5a3938eb636d4cadac9668cf464 into ca756322a74aceb83703cd64b98cf392477ef295
ca756322a7 Add regression test for issue #1323.
eed88fc61f ivlpp: Ensure def_buf is allocated when calling macro_start_args()
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luke synced commits to refs/heads/refs/pull/7426/merge at luke/verilator from mirror 2026-04-20 15:07:22 +02:00
d59a0dd287 Merge 8a7f55b117a43ca3640abe06836f5d7feaf2f256 into 935b2564eb70b354c9786c570a94449cce8512fe
935b2564eb Use NFA in SVA pass (V3AssertNfa: NFA-based multi-lcycle SVA evaluation engine) (#7430)
e82bd52fa3 Optimize arithmetic right shift (>>>) in DfgBreakCycles (#7447)
60b41c7822 Optimize DfgBreakCycles IndependentBits analysis ordering (#7446)
97454a1bc5 Remove multi-threaded FST tracing (#7443)
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luke synced commits to refs/heads/refs/pull/7437/head at luke/verilator from mirror 2026-04-20 15:07:22 +02:00
76800c3548 Merge branch 'feature/4_state_logic_two_vars_sq' into feature/four-state-shuffle
42fe76d956 Merge branch 'master' into feature/4_state_logic_two_vars_sq
935b2564eb Use NFA in SVA pass (V3AssertNfa: NFA-based multi-lcycle SVA evaluation engine) (#7430)
e82bd52fa3 Optimize arithmetic right shift (>>>) in DfgBreakCycles (#7447)
60b41c7822 Optimize DfgBreakCycles IndependentBits analysis ordering (#7446)
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luke synced commits to refs/heads/refs/pull/7437/merge at luke/verilator from mirror 2026-04-20 15:07:22 +02:00
fc914bb893 Merge 76800c35486cd64a51d72f70c9ad4ae51e9e664d into 935b2564eb70b354c9786c570a94449cce8512fe
76800c3548 Merge branch 'feature/4_state_logic_two_vars_sq' into feature/four-state-shuffle
42fe76d956 Merge branch 'master' into feature/4_state_logic_two_vars_sq
935b2564eb Use NFA in SVA pass (V3AssertNfa: NFA-based multi-lcycle SVA evaluation engine) (#7430)
e82bd52fa3 Optimize arithmetic right shift (>>>) in DfgBreakCycles (#7447)
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luke synced commits to refs/heads/refs/pull/7299/merge at luke/verilator from mirror 2026-04-20 15:07:21 +02:00
094f4bbbcb Merge ed004f5784474e17b47d1a8701a5d770c20b543b into 935b2564eb70b354c9786c570a94449cce8512fe
935b2564eb Use NFA in SVA pass (V3AssertNfa: NFA-based multi-lcycle SVA evaluation engine) (#7430)
e82bd52fa3 Optimize arithmetic right shift (>>>) in DfgBreakCycles (#7447)
60b41c7822 Optimize DfgBreakCycles IndependentBits analysis ordering (#7446)
97454a1bc5 Remove multi-threaded FST tracing (#7443)
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luke synced commits to refs/heads/refs/pull/7313/merge at luke/verilator from mirror 2026-04-20 15:07:21 +02:00
c8dc989a49 Merge 2d4073999afa5ba962e4174fbece628565844ec7 into 935b2564eb70b354c9786c570a94449cce8512fe
935b2564eb Use NFA in SVA pass (V3AssertNfa: NFA-based multi-lcycle SVA evaluation engine) (#7430)
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luke synced commits to refs/heads/refs/pull/7345/merge at luke/verilator from mirror 2026-04-20 15:07:21 +02:00
6def36e6e7 Merge c66d4729c2a0426d09961b44ce464ca0af156e1c into 935b2564eb70b354c9786c570a94449cce8512fe
935b2564eb Use NFA in SVA pass (V3AssertNfa: NFA-based multi-lcycle SVA evaluation engine) (#7430)
e82bd52fa3 Optimize arithmetic right shift (>>>) in DfgBreakCycles (#7447)
60b41c7822 Optimize DfgBreakCycles IndependentBits analysis ordering (#7446)
97454a1bc5 Remove multi-threaded FST tracing (#7443)
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luke synced commits to refs/heads/refs/pull/7391/merge at luke/verilator from mirror 2026-04-20 15:07:21 +02:00
0acceaa66f Merge e0f908045ad42de3ee429cd5cb45882a35d8d076 into 935b2564eb70b354c9786c570a94449cce8512fe
935b2564eb Use NFA in SVA pass (V3AssertNfa: NFA-based multi-lcycle SVA evaluation engine) (#7430)
e82bd52fa3 Optimize arithmetic right shift (>>>) in DfgBreakCycles (#7447)
60b41c7822 Optimize DfgBreakCycles IndependentBits analysis ordering (#7446)
97454a1bc5 Remove multi-threaded FST tracing (#7443)
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luke synced commits to refs/heads/refs/pull/7402/merge at luke/verilator from mirror 2026-04-20 15:07:21 +02:00
7e88f79837 Merge c20a6f4396ca7445657f876ed8c034bd1e0373bc into 935b2564eb70b354c9786c570a94449cce8512fe
935b2564eb Use NFA in SVA pass (V3AssertNfa: NFA-based multi-lcycle SVA evaluation engine) (#7430)
e82bd52fa3 Optimize arithmetic right shift (>>>) in DfgBreakCycles (#7447)
60b41c7822 Optimize DfgBreakCycles IndependentBits analysis ordering (#7446)
97454a1bc5 Remove multi-threaded FST tracing (#7443)
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luke synced commits to refs/heads/refs/pull/7412/merge at luke/verilator from mirror 2026-04-20 15:07:21 +02:00
e561d5dbd5 Merge f2ccffe4553e2a91080c2d847cfff3ce8635e88f into 935b2564eb70b354c9786c570a94449cce8512fe
935b2564eb Use NFA in SVA pass (V3AssertNfa: NFA-based multi-lcycle SVA evaluation engine) (#7430)
e82bd52fa3 Optimize arithmetic right shift (>>>) in DfgBreakCycles (#7447)
60b41c7822 Optimize DfgBreakCycles IndependentBits analysis ordering (#7446)
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luke synced commits to refs/heads/refs/pull/7117/merge at luke/verilator from mirror 2026-04-20 15:07:20 +02:00
c4654e7bf5 Merge 1117a11d4d1244e76db4f9f28aaac697464a8ad1 into e82bd52fa334b7ee1b4073465e5f434430c7da04
e82bd52fa3 Optimize arithmetic right shift (>>>) in DfgBreakCycles (#7447)
60b41c7822 Optimize DfgBreakCycles IndependentBits analysis ordering (#7446)
97454a1bc5 Remove multi-threaded FST tracing (#7443)
f7a349c5a7 Fix uvm_hdl_release_and_read not reading release value or checking for success (#7425)
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