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Mistral's gotten a bit more mature now.

Lofty 2023-05-27 21:56:54 +01:00
parent 25549a7384
commit 3eaf9cd622
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FPGA-family-feature-matrix.md

@ -20,9 +20,9 @@ The table on this page aims to keep track of which FPGA primitives are supported
| ├ Local | ✔️ |✔️ |✔️ |✔️ |✔️ |⚠️ |
| ├ Global | ✔️ |🚧 |✔️ |✔️ |✔️ |⚠️ |
| └ Long wires | ✔️ |❌ (N/A) |❌ (N/A) |❌ (N/A) |❌ (N/A) |❌ (N/A) |
| Timing | ✔️ |❌ |✔️ |✔️ |✔️ |🚧 (nominal delays only) |
| ├ Logic | ✔️ |❌ |✔️ |✔️ |✔️ |🚧 (nominal delays only) |
| ├ Routing | ✔️ |❌ |✔️ |✔️ |✔️ |🚧 (nominal delays only) |
| Timing | ✔️ |❌ |✔️ |✔️ |✔️ |⚠️ |
| ├ Logic | ✔️ |❌ |✔️ |✔️ |✔️ |⚠️ |
| ├ Routing | ✔️ |❌ |✔️ |✔️ |✔️ |⚠️ |
| └ IO buffer | ✔️ |❌ |🚧 |🚧 |❌ |❌ |
| symbol | meaning |