Emil J. Tywoniak fbd7c249ec rtlil: remove dead verilog bindings

2026-08-31 22:13:01 +02:00

..

build

Update top-level Python project for CMake compatibility.

2026-06-03 09:03:23 +00:00

CMakeLists.txt

[core] add a cmake option to disable unit test during compilation; Use cmake_current_source for submodule integration

2026-08-21 12:09:04 -07:00

generator.py

rtlil: remove dead verilog bindings

2026-08-31 22:13:01 +02:00

hashlib.h

Update top-level Python project for CMake compatibility.

2026-06-03 09:03:23 +00:00

modinit.py

Migrate build system to CMake

2026-06-03 08:58:10 +00:00

wrappers_tpl.cc

Migrate build system to CMake

2026-06-03 08:58:10 +00:00