yosys/frontends at ec2b287c1eae3f5f780b33bb445ba4c7454f37f7 - yosys - Gitea: Git with a cup of tea

luke/yosys

mirror of https://github.com/YosysHQ/yosys.git synced 2026-10-07 02:23:09 +02:00

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nella 315f8194a0 Don't mark cells w no unput as boxes.

2026-09-21 16:58:03 +02:00

..

Revert "Temporarily revert #6101 and #6077 "

2026-09-10 09:09:13 +02:00

Merge pull request #6161 from YosysHQ/emil/remove-dead-bindings

2026-09-09 16:51:35 +00:00

abc: re-isolate autoidx churn

2026-09-10 18:16:57 +02:00

json: read 'signed' attribute on netnames, matching ports

2026-08-20 22:20:24 -07:00

Don't mark cells w no unput as boxes.

2026-09-21 16:58:03 +02:00

Migrate build system to CMake

2026-06-03 08:58:10 +00:00

long long to int truncation checks

2026-07-10 14:36:39 +02:00

sv-elab: Update to release 2026-09-08

2026-09-08 11:58:13 +02:00

Fix remaining mentions, and update links

2026-09-10 10:24:34 +02:00

rtlil: remove dead verilog bindings

2026-08-31 22:13:01 +02:00

CMakeLists.txt

Revert "Temporarily revert #6101 and #6077 "

2026-09-10 09:09:13 +02:00