yosys/techlibs
Marc Emery e138c218cc gatemate: fix CC_FIFO_40K sim for non 2^n width usages
The fifo address calculation  is not correct for the the non power of 2  fifo WIDTHs. When using only power of 2 data, the behavior of the fifo is correct (for example 32 bits in 40 bits mode). When using the full bits, the MSB is incorrect (bit 39:32 for 40 bits mode for example).
2026-07-16 18:12:29 +02:00
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achronix End of file fix 2026-06-23 07:23:41 +02:00
analogdevices Remove trailing whitespaces 2026-06-23 07:24:59 +02:00
anlogic Remove trailing whitespaces 2026-06-23 07:24:59 +02:00
common mul2dsp: normalize operand order 2026-07-15 16:21:07 +02:00
coolrunner2 Migrate build system to CMake 2026-06-03 08:58:10 +00:00
easic Migrate build system to CMake 2026-06-03 08:58:10 +00:00
efinix Merge branch 'main' into nella/latch-toggle 2026-07-08 11:41:08 +02:00
fabulous Remove old techmap. 2026-07-08 12:07:58 +02:00
gatemate gatemate: fix CC_FIFO_40K sim for non 2^n width usages 2026-07-16 18:12:29 +02:00
gowin Remove trailing whitespaces 2026-06-23 07:24:59 +02:00
greenpak4 Migrate build system to CMake 2026-06-03 08:58:10 +00:00
ice40 Merge branch 'main' into nella/latch-toggle 2026-07-08 11:41:08 +02:00
intel End of file fix 2026-06-23 07:23:41 +02:00
intel_alm Remove trailing whitespaces 2026-06-23 07:24:59 +02:00
lattice Merge branch 'main' into nella/latch-toggle 2026-07-08 11:41:08 +02:00
microchip Remove trailing whitespaces 2026-06-23 07:24:59 +02:00
nanoxplore Merge branch 'main' into nella/latch-toggle 2026-07-08 11:41:08 +02:00
quicklogic Merge branch 'main' into nella/latch-toggle 2026-07-08 11:41:08 +02:00
sf2 Remove trailing whitespaces 2026-06-23 07:24:59 +02:00
xilinx Remove trailing whitespaces 2026-06-23 07:24:59 +02:00
CMakeLists.txt Migrate build system to CMake 2026-06-03 08:58:10 +00:00
fix_mod.py Remove trailing whitespaces 2026-06-23 07:24:59 +02:00