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gatemate: fix CC_FIFO_40K sim for non 2^n width usages 

The fifo address calculation  is not correct for the the non power of 2  fifo WIDTHs. When using only power of 2 data, the behavior of the fifo is correct (for example 32 bits in 40 bits mode). When using the full bits, the MSB is incorrect (bit 39:32 for 40 bits mode for example).
This commit is contained in:
Marc Emery 2026-07-16 18:12:29 +02:00
parent 45ea2b8d6c
commit e138c218cc
1 changed files with 2 additions and 2 deletions
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4
techlibs/gatemate/cells_sim.v
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@ -1683,8 +1683,8 @@ module CC_FIFO_40K (
end
always @(*) begin
fifo_wraddr = {wr_pointer[tp-1:0], {(15-tp){1'b0}}};
fifo_rdaddr = {rd_pointer[tp-1:0], {(15-tp){1'b0}}};
fifo_wraddr = wr_pointer[tp-1:0] * B_WIDTH;
fifo_rdaddr = rd_pointer[tp-1:0] * A_WIDTH;
rdaddr = {rd_pointer[tp], rd_pointer_int[tp-1:0]};
wraddr = {{(15-tp){1'b0}}, wr_pointer[tp], wr_pointer_int[tp:0]};