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mirror of https://github.com/YosysHQ/yosys.git synced 2026-09-05 19:36:55 +02:00
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dcb9c0d7af91ccbd189f46bb282e433a0f82eafe
yosys/techlibs/common
T
History
Lofty f0b5225134 flowmap: remove
2026-07-22 13:50:33 +01:00
..
choices
Merge pull request #4789 from YosysHQ/emil/sklansky-adder
2024-12-03 11:33:13 +01:00
abc9_map.v
…
abc9_model.v
…
abc9_unmap.v
…
adff2dff.v
…
CMakeLists.txt
flowmap: remove
2026-07-22 13:50:33 +01:00
cmp2lcu.v
…
cmp2lut.v
…
cmp2softlogic.v
techlibs: Add cmp2softlogic.v to common
2023-11-13 10:42:12 +01:00
dff2ff.v
…
gate2lut.v
…
gen_fine_ffs.py
simcells: Apply group tags
2024-10-15 07:35:40 +13:00
mul2dsp.v
mul2dsp: normalize operand order
2026-07-15 16:21:07 +02:00
opensta.cc
Migrate build system to CMake
2026-06-03 08:58:10 +00:00
opensta.h
opensta: refactor default command
2025-11-19 15:20:50 +01:00
pmux2mux.v
…
prep.cc
Move Design::sort() calls out of opt and opt_clean passes into the synth passes that need them.
2026-01-23 01:14:35 +00:00
sdc_expand.cc
opensta, sdc_expand: mark as experimental
2025-11-19 15:31:17 +01:00
simcells.v
simcells: $dffsr and derivatives undefine S&R in logic tables
2026-03-19 19:27:30 +01:00
simlib.v
Remove trailing whitespaces
2026-06-23 07:24:59 +02:00
smtmap.v
Add smtmap.v describing the smt2 backend's behavior for undef bits
2022-10-20 15:48:18 +02:00
synth.cc
flowmap: remove
2026-07-22 13:50:33 +01:00
techmap.v
simplemap: Moves $pmux mapping from techmap.v to simple map
2026-04-29 21:20:39 +00:00
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