…

..

abc9-nonbox-loop-with-box.ys

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abc9.ys

…

abc_state.ys

…

abc_temp_dir_sanitization.ys

…

adff2dff.ys

…

aigmap.ys

…

autopurge.ys

…

bmuxmap_pmux.ys

…

booth_map_script.ys_

renamed passname to booth, replaced connect_sigSpecToWire with connect, updated test script

2023-09-08 15:34:56 -07:00

booth.ys

…

buf.ys

opt_clean, simplemap: Add $buf handling

2025-03-07 16:08:38 +01:00

bufnorm.ys

tests/bufnorm: add test for bufnorm of constant

2024-11-07 12:55:50 +01:00

bug2183.ys

…

bug2321.ys

…

bug2332.ys

…

bug2759.ys

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bug2972.ys

…

bug5495.abc

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bug5495.sh

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bug5495.v

Tests: Add testcase for problematic ABC DONE check

2025-11-21 14:46:01 +13:00

bug5574.ys

tests/bug5574: Fix for non threaded abc

2026-01-20 05:56:14 +13:00

cellmatch.ys

…

cellname.ys

…

clkbufmap.ys

clkbufmap: improve input pad handling.

2020-07-09 18:48:01 +02:00

clockgate_bad.il

End of file fix

2026-06-23 07:23:41 +02:00

clockgate_neg.lib

End of file fix

2026-06-23 07:23:41 +02:00

clockgate_pos.lib

End of file fix

2026-06-23 07:23:41 +02:00

clockgate_wide.v

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clockgate.lib

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clockgate.tcl

…

clockgate.v

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cmp2lcu.ys

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constmap.ys

Add check at constmap and merge test

2025-04-14 11:44:52 +01:00

dff2ff.ys

…

dffinit.ys

dffinit: Avoid setting init parameter to zero-length value.

2020-04-14 19:52:19 +02:00

dfflegalize_adff_init.ys

…

dfflegalize_adff.ys

…

dfflegalize_adlatch_init.ys

…

dfflegalize_adlatch.ys

…

dfflegalize_aldff_init.ys

…

dfflegalize_aldff.ys

…

dfflegalize_dff_init.ys

…

dfflegalize_dff.ys

…

dfflegalize_dffsr_init.ys

…

dfflegalize_dffsr.ys

…

dfflegalize_dlatch_const.ys

…

dfflegalize_dlatch_emu.ys

…

dfflegalize_dlatch_init.ys

…

dfflegalize_dlatch.ys

…

dfflegalize_dlatchsr_init.ys

…

dfflegalize_dlatchsr.ys

…

dfflegalize_inv.ys

…

dfflegalize_mince.ys

…

dfflegalize_minsrst.ys

…

dfflegalize_sr_init.ys

…

dfflegalize_sr.ys

…

dfflibmap_dff_not_next.lib

dfflibmap: fix next_state inversion propagation for DFF flops by inverting reset value polarity

2025-10-28 13:56:28 +01:00

dfflibmap_dffn_dffe.lib

Remove trailing whitespaces

2026-06-23 07:24:59 +02:00

dfflibmap_dffsr_mixedpol.lib

dfflibmap: test negated state next_state with mixed polarities

2025-07-10 18:54:43 +02:00

dfflibmap_dffsr_not_next_l.lib

…

dfflibmap_dffsr_not_next.lib

End of file fix

2026-06-23 07:23:41 +02:00

dfflibmap_dffsr_r.lib

dfflibmap: test dffsr with either priority liberty file

2026-03-03 10:34:29 +01:00

dfflibmap_dffsr_s.lib

dfflibmap: test dffsr with either priority liberty file

2026-03-03 10:34:29 +01:00

dfflibmap_dffsr_x.lib

dfflibmap: fix formal $dffsr tests with sat, prove "no s&r" assumption only needed when appropriate

2026-03-03 10:35:03 +01:00

dfflibmap_formal.ys

End of file fix

2026-06-23 07:23:41 +02:00

dfflibmap_proc_formal.ys

dfflibmap: fix formal verilog test so that it actually maps all flops

2026-07-27 22:08:39 +02:00

dfflibmap_resetval_clobber.lib

dfflibmap: add regression test for resetval clobber

2026-07-14 18:02:02 +02:00

dfflibmap_resetval_clobber.ys

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dfflibmap_wide.ys

…

dfflibmap-sim.v

dfflibmap: cover enable inference with test

2024-12-09 14:18:08 +01:00

dfflibmap.lib

…

dfflibmap.ys

dfflibmap: test dffsr with either priority liberty file

2026-03-03 10:34:29 +01:00

dffunmap.ys

…

extractinv.ys

…

generate_mk.py

…

han-carlson.tcl

…

iopadmap.ys

…

kogge-stone.tcl

…

lcu_refined.v

…

lut2bmux.ys

…

lut2mux.ys

…

mem_simple_4x1_cells.v

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mem_simple_4x1_map.v

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mem_simple_4x1_runtest.sh

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mem_simple_4x1_tb.v

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mem_simple_4x1_uut.v

…

module_not_derived.ys

Add test

2026-01-19 18:34:55 -08:00

mul2dsp_asymmetric.ys

…

pmux2mux.ys

…

recursive_map.v

Add test

2019-08-20 20:05:16 -07:00

recursive_runtest.sh

…

recursive.v

Add test

2019-08-20 20:05:16 -07:00

shiftx2mux.ys

…

sklansky.tcl

…

techmap_chtype.ys

…

techmap_replace.ys

techmap: Fix cell names with _TECHMAP_REPLACE_.*

2020-03-23 11:17:07 +01:00

wireinit.ys

Fix _TECHMAP_REMOVEINIT_ handling.

2019-09-27 18:34:12 +02:00

xaiger2-5169.ys

…

zinit.ys

Reenable existing equiv_opt tests

2022-10-07 16:04:51 +02:00