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nella
77bca709d4
iopadmap inserted $__FABULOUS_* cells with no module, so their port directions were unknown to later passes. Read with -icells so the module names match the cell types.
19 lines
449 B
Verilog
19 lines
449 B
Verilog
// Pad cells inserted by synth_fabulous via iopadmap.
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// Mapped to fabric primitives by a user supplied -extra-map.
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(* blackbox *)
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module \$__FABULOUS_IBUF (input PAD, output OUT);
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endmodule
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(* blackbox *)
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module \$__FABULOUS_OBUF (output PAD, input IN);
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endmodule
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(* blackbox *)
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module \$__FABULOUS_TBUF (output PAD, input IN, input EN);
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endmodule
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(* blackbox *)
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module \$__FABULOUS_IOBUF (inout PAD, output OUT, input IN, input EN);
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endmodule
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