yosys/techlibs
mrcmry 9b3be5a6c0
Merge e138c218cc into 07a615a283
2026-07-28 06:38:25 +02:00
..
achronix End of file fix 2026-06-23 07:23:41 +02:00
analogdevices Remove trailing whitespaces 2026-06-23 07:24:59 +02:00
anlogic Remove trailing whitespaces 2026-06-23 07:24:59 +02:00
common flowmap: remove 2026-07-22 13:50:33 +01:00
coolrunner2 Migrate build system to CMake 2026-06-03 08:58:10 +00:00
easic Migrate build system to CMake 2026-06-03 08:58:10 +00:00
efinix Merge branch 'main' into nella/latch-toggle 2026-07-08 11:41:08 +02:00
fabulous Remove old techmap. 2026-07-08 12:07:58 +02:00
gatemate gatemate: fix CC_FIFO_40K sim for non 2^n width usages 2026-07-16 18:12:29 +02:00
gowin Remove trailing whitespaces 2026-06-23 07:24:59 +02:00
greenpak4 Migrate build system to CMake 2026-06-03 08:58:10 +00:00
ice40 flowmap: remove 2026-07-22 13:50:33 +01:00
intel End of file fix 2026-06-23 07:23:41 +02:00
intel_alm Remove trailing whitespaces 2026-06-23 07:24:59 +02:00
lattice Merge pull request #6054 from YosysHQ/gatecat/nexus-radiant-fix 2026-07-19 13:22:46 +00:00
microchip Remove trailing whitespaces 2026-06-23 07:24:59 +02:00
nanoxplore Merge branch 'main' into nella/latch-toggle 2026-07-08 11:41:08 +02:00
quicklogic Merge branch 'main' into nella/latch-toggle 2026-07-08 11:41:08 +02:00
sf2 Remove trailing whitespaces 2026-06-23 07:24:59 +02:00
xilinx xilinx_srl: keep the clock enable on FDRE shift registers 2026-07-20 23:59:40 -07:00
CMakeLists.txt Migrate build system to CMake 2026-06-03 08:58:10 +00:00
fix_mod.py Remove trailing whitespaces 2026-06-23 07:24:59 +02:00