Robert O'Callahan 755836cd60 Parallelize `opt_merge`. ... I'm not sure why but this is actually faster than existing `opt_merge` even with YOSYS_MAX_THREADS=1, for the jpeg synthesis test. 16.0s before, 15.5s after for end-to-end synthesis.		2025-12-09 14:16:26 +00:00
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cmds	Remove cover() coverage tracking	2025-12-04 16:27:13 +01:00
equiv	Merge pull request #5357 from rocallahan/builtin-ff	2025-09-17 11:37:16 +02:00
fsm	fsm_detect: add adff detection	2025-11-06 23:29:47 +02:00
hierarchy	hierarchy.cc: Tidying	2025-10-15 09:42:47 +13:00
memory	Remove .c_str() from parameters to log_debug()	2025-09-23 19:10:33 +12:00
opt	Parallelize `opt_merge`.	2025-12-09 14:16:26 +00:00
pmgen	Remove .c_str() from log_cmd_error() and log_file_error() parameters	2025-09-16 22:59:08 +00:00
proc	Update passes/proc to avoid bits()	2025-09-16 03:17:23 +00:00
sat	Revert sim's cycle_width default back to 10, but keep -width option	2025-10-20 14:40:05 +02:00
techmap	Merge pull request #5496 from YosysHQ/emil/liberty-flop-loops	2025-12-01 22:50:20 +01:00
tests	Remove .c_str() from parameters to log_debug()	2025-09-23 19:10:33 +12:00