Emil J. Tywoniak 6997ed28b3 opt_merge: newcelltypes		2026-05-06 13:52:25 +02:00
..
cmds	check: fix memory bug in $connect	2026-05-05 21:35:14 +02:00
equiv	equiv_miter: don't copy $input_port	2026-05-05 21:35:14 +02:00
fsm	fsm_detect: add adff detection	2025-11-06 23:29:47 +02:00
hierarchy	flatten: disable signorm	2026-05-05 21:35:14 +02:00
memory	memory_bram: create blackboxes	2026-05-05 21:35:14 +02:00
opt	opt_merge: newcelltypes	2026-05-06 13:52:25 +02:00
pmgen	pmgen: hold sigmap pointer instead of owning it	2026-05-05 21:35:14 +02:00
proc	proc_clean: Removing an empty full_case is doing something	2026-01-07 13:10:32 +13:00
sat	signorm: disable passes that use rewrite_sigspecs	2026-05-05 21:35:13 +02:00
techmap	Revert "techmap: call hierarchy on map files to determine port directions"	2026-05-05 21:35:14 +02:00
tests	test_cell.cc: Generate .aag for all compatible cells	2025-12-02 14:03:36 +13:00