mirror of https://github.com/YosysHQ/yosys.git
Dump module details when `design_equal` fails |
||
|---|---|---|
| .. | ||
| cmds | ||
| equiv | ||
| fsm | ||
| hierarchy | ||
| memory | ||
| opt | ||
| pmgen | ||
| proc | ||
| sat | ||
| techmap | ||
| tests | ||
Dump module details when `design_equal` fails |
||
|---|---|---|
| .. | ||
| cmds | ||
| equiv | ||
| fsm | ||
| hierarchy | ||
| memory | ||
| opt | ||
| pmgen | ||
| proc | ||
| sat | ||
| techmap | ||
| tests | ||