yosys/tests
Akash Levy 3fc74be3e2
Merge branch 'YosysHQ:main' into main
2025-05-28 01:54:49 +02:00
..
aiger read_aiger: Fix incorrect read of binary Aiger without outputs 2024-04-29 14:06:58 +01:00
alumacc macc_v2: Add test 2025-01-27 13:19:26 +01:00
arch URAM mapping : Add test for 2048 x 144b 2025-05-10 14:53:56 +02:00
asicworld tests: use /usr/bin/env for bash. 2023-08-12 11:59:39 +10:00
bind Add support for parsing the SystemVerilog 'bind' construct 2021-07-16 09:31:39 -04:00
blif Changed boolopt naming 2025-01-16 19:36:27 -08:00
bram tests: use /usr/bin/env for bash. 2023-08-12 11:59:39 +10:00
cxxrtl Reinstate #4768 2025-04-08 11:58:05 +12:00
errors Rename the generic "Syntax error" message from the Verilog/SystemVerilog parser into unique, 2018-10-25 02:37:56 +03:00
fmt cxxrtl: always lazily format print messages. 2024-01-19 18:55:23 +00:00
fsm tests: use /usr/bin/env for bash. 2023-08-12 11:59:39 +10:00
functional functional tests: run from make tests but not smtlib/rkt tests 2024-09-04 10:30:08 +01:00
hana tests: use /usr/bin/env for bash. 2023-08-12 11:59:39 +10:00
liberty libcache: fix test 2025-05-09 12:40:38 +02:00
lut tests: use /usr/bin/env for bash. 2023-08-12 11:59:39 +10:00
memfile tests: use /usr/bin/env for bash. 2023-08-12 11:59:39 +10:00
memlib fixes for the yosys test 2025-03-27 17:19:08 -07:00
memories rtlil: Adjust internal check for `$mem_v2` cells 2024-11-08 15:18:43 +01:00
opt Merge branch 'YosysHQ:main' into main 2025-05-22 10:30:58 -07:00
opt_share tests: use /usr/bin/env for bash. 2023-08-12 11:59:39 +10:00
peepopt Bump yosys to latest 2025-05-15 14:44:26 -07:00
proc Merge pull request #4714 from georgerennie/george/proc_dff_bug_multiple_sigs 2024-11-20 13:26:32 +01:00
realmath tests: use /usr/bin/env for bash. 2023-08-12 11:59:39 +10:00
rpc Remove references to ilang 2024-11-05 12:36:31 +13:00
sat share: Cleanup and additional testing 2025-04-15 12:34:46 +02:00
select design.cc: Fix selections when copying 2025-04-08 16:35:12 +12:00
share tests: use /usr/bin/env for bash. 2023-08-12 11:59:39 +10:00
silimate Merge pull request #82 from donn/splitlarge 2025-05-15 15:00:45 -07:00
sim fstdata.cc: Fix last step 2025-05-12 13:18:19 +12:00
simple Final cleanup 2025-02-14 10:18:13 -08:00
simple_abc9 Reinstate #4768 2025-04-08 11:58:05 +12:00
smv Remove references to ilang 2024-11-05 12:36:31 +13:00
sva tests/sva: Skip sva tests that use SBY until SBY is compatible again 2024-03-05 14:37:33 +01:00
svinterfaces tests: use /usr/bin/env for bash. 2023-08-12 11:59:39 +10:00
svtypes Sync 2024-12-19 21:40:30 -08:00
techmap Merge upstream yosys 2025-04-21 17:36:24 -07:00
tools support file locations containing spaces 2022-08-08 20:30:50 +02:00
unit rtlil: Add {from,to}_hdl_index methods to Wire 2025-02-18 17:08:45 +01:00
various Bump yosys to latest 2025-05-15 14:44:26 -07:00
verific Revert clocking.ys 2025-02-13 20:32:17 -08:00
verilog Merge pull request #5141 from garytwong/unique-if 2025-05-27 09:45:50 +12:00
vloghtb tests: use /usr/bin/env for bash. 2023-08-12 11:59:39 +10:00
xprop tests: Comment on `A[0]` 2024-02-16 11:43:28 +01:00
gen-tests-makefile.sh Update gen-tests-makefile.sh 2025-03-27 10:33:51 +13:00