yosys/tests/arch/gowin
Johan Olby 3540d700a3
gowin: Correct B_MINWIDTH for 27x17
The 27x18 rule carried B_MINWIDTH=13, so any product whose narrower operand
was below 13 (e.g. 27x4, 4x13) was rejected even though it fits one
MULTALU27X18 tile, and decomposed onto MULT12X12 partials instead. Drop the
floor to 2 so the rule blocks only degenerate Nx1 multiplies, matching the
rest of the tree.

Adds a 4x13 regression case.
2026-07-16 17:35:55 +02:00
..
add_sub.ys End of file fix 2026-06-23 07:23:41 +02:00
adffs.ys update test 2019-12-03 16:56:15 +01:00
bug5688.ys tests/arch/gowin: Add wr_en test 2026-02-22 09:00:37 +01:00
compare.v gowin: Fix X output of $alu techmap 2023-05-01 17:56:41 +02:00
compare.ys End of file fix 2026-06-23 07:23:41 +02:00
counter.ys ice40, ecp5, gowin: enable ABC9 by default 2023-11-13 15:28:13 +00:00
dffs.ys Add some tests 2019-10-21 16:25:15 +02:00
fsm.ys fix fsm test with proper clock enable polarity 2019-11-11 17:51:26 +01:00
generate_mk.py Convert gen-tests shell script to python 2026-04-16 11:00:44 +02:00
init-error.ys gowin: Use dfflegalize. 2020-07-06 12:27:46 +02:00
init.v attempt to fix formatting 2019-11-25 14:50:34 +01:00
init.ys ice40, ecp5, gowin: enable ABC9 by default 2023-11-13 15:28:13 +00:00
latches.ys gowin: add hardware latch support (DL/DLN/DLC/DLP variants) 2026-03-05 16:04:23 +01:00
logic.ys Move rename logic to abc_ops_reintegrate 2026-06-19 10:46:47 +01:00
lutram.ys gowin: Fix LUT RAM inference, add more models. 2022-02-09 09:04:34 +01:00
mul_gw1n.ys gowin: dsp: Add mult inference tests 2026-02-12 14:12:32 +03:00
mul_gw2a.ys gowin: dsp: Add mult inference tests 2026-02-12 14:12:32 +03:00
mul_gw5a.v gowin: infer DSP multipliers for the GW5A family 2026-07-12 21:00:21 +02:00
mul_gw5a.ys gowin: Correct B_MINWIDTH for 27x17 2026-07-16 17:35:55 +02:00
mux.ys Revert "Fix tests due to ABC improvements" 2026-05-11 14:47:08 +02:00
shifter.ys Add some tests 2019-10-21 16:25:15 +02:00
tribuf.ys End of file fix 2026-06-23 07:23:41 +02:00