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mirror of https://github.com/YosysHQ/yosys.git synced 2026-09-07 04:19:56 +02:00
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1202f7aa4bb0f9afde157ebc4701d64e7e38abd8
yosys/passes
T
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Clifford Wolf 1202f7aa4b Renamed "stdcells.v" to "techmap.v"
2014-07-31 02:32:00 +02:00
..
abc
Using log_assert() instead of assert()
2014-07-28 11:27:48 +02:00
cmds
Added write_file command
2014-07-30 19:59:29 +02:00
fsm
Using log_assert() instead of assert()
2014-07-28 11:27:48 +02:00
hierarchy
Allow "hierarchy -generate" for $__ cells
2014-07-29 16:35:13 +02:00
memory
Added $shift and $shiftx cell types (needed for correct part select behavior)
2014-07-29 16:35:13 +02:00
opt
Added $shift and $shiftx cell types (needed for correct part select behavior)
2014-07-29 16:35:13 +02:00
proc
Using log_assert() instead of assert()
2014-07-28 11:27:48 +02:00
sat
Using log_assert() instead of assert()
2014-07-28 11:27:48 +02:00
techmap
Renamed "stdcells.v" to "techmap.v"
2014-07-31 02:32:00 +02:00
tests
Added "techmap -assert"
2014-07-31 02:21:41 +02:00
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