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mirror of https://github.com/YosysHQ/yosys.git synced 2026-09-05 11:35:20 +02:00
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nick/ast_range_err_message
yosys/techlibs/microchip
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History
Lofty 1f72d02f39 synth_microchip: remove classic ABC mapping
2026-08-19 11:43:00 +01:00
..
arith_map.v
Remove trailing whitespaces
2026-06-23 07:24:59 +02:00
brams_defs.vh
End of file fix
2026-06-23 07:23:41 +02:00
cells_map.v
End of file fix
2026-06-23 07:23:41 +02:00
cells_sim.v
Remove trailing whitespaces
2026-06-23 07:24:59 +02:00
CMakeLists.txt
CMake: add missing dependency edges for synth_* passes.
2026-08-06 14:48:56 +00:00
LSRAM_map.v
Remove trailing whitespaces
2026-06-23 07:24:59 +02:00
LSRAM.txt
Remove trailing whitespaces
2026-06-23 07:24:59 +02:00
microchip_dffopt.cc
Refactored uses of log_id()
2026-05-08 20:59:24 -07:00
microchip_dsp_cascade.pmg
Remove trailing whitespaces
2026-06-23 07:24:59 +02:00
microchip_dsp_CREG.pmg
Remove trailing whitespaces
2026-06-23 07:24:59 +02:00
microchip_dsp.cc
Remove pmgen related users of log_id
2026-05-14 17:28:10 +02:00
microchip_dsp.pmg
Remove trailing whitespaces
2026-06-23 07:24:59 +02:00
polarfire_dsp_map.v
Remove trailing whitespaces
2026-06-23 07:24:59 +02:00
synth_microchip.cc
synth_microchip: remove classic ABC mapping
2026-08-19 11:43:00 +01:00
uSRAM_map.v
Remove trailing whitespaces
2026-06-23 07:24:59 +02:00
uSRAM.txt
Remove trailing whitespaces
2026-06-23 07:24:59 +02:00
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