luke
/
yosys
mirror of https://github.com/YosysHQ/yosys.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity
15,692 Commits 129 Branches 62 Tags 54 MiB
Commit Graph

1980 Commits

Author SHA1 Message Date
Ethan Mahintorabi d10190606c verilog: Lower required bison version to 3.6 
We're currently on version 3.6 of bison at Google, and Yosys
still correctly builds with it. This should better reflect
the actual requirements rather than an overly restrictive
check. If features from 3.8 are required it seems like bumping
would be appropriate.

Signed-off-by: Ethan Mahintorabi <ethanmoon@google.com>
 2025-08-21 08:26:33 +01:00
Ethan Mahintorabi 7f0130efce verilog: Fix missing sstream include 
Signed-off-by: Ethan Mahintorabi <ethanmoon@google.com>
 2025-08-21 08:26:20 +01:00
Emil J dbb977aa8b
Merge pull request #5288 from YosysHQ/emil/demote-verilog-parser-errors-again 
verilog: demote some parser errors to warnings again
 2025-08-13 12:52:50 +02:00
Emil J. Tywoniak 1603828b30 verilog_parser: fix locations of warnings for restrict keyword 2025-08-13 10:56:48 +02:00
Emil J. Tywoniak 910ff3ff36 verilog: demote some parser errors to warnings again 2025-08-13 10:54:47 +02:00
Emil J. Tywoniak 8582136a45 simplify: fix $initstate segfault 2025-08-12 12:39:36 +02:00
Emil J. Tywoniak 642e041f77 const2ast: fix for consistency with previous diagnostics behavior 2025-08-11 13:34:10 +02:00
Emil J. Tywoniak 99ab73424d verilog_location: rename location to Location to avoid conflict with Pass::location 2025-08-11 13:34:10 +02:00
Emil J. Tywoniak 5195f81257 ast: fix import node 2025-08-11 13:34:10 +02:00
Emil J. Tywoniak df8422d244 verilog_lexer: refactor 2025-08-11 13:34:10 +02:00
Emil J. Tywoniak 740ed3fc1c ast: refactor 2025-08-11 13:34:10 +02:00
Emil J. Tywoniak 646c45e6b8 ast: remove null_check as dead code 2025-08-11 13:34:10 +02:00
Emil J. Tywoniak 25d2a8ce3a simplify: simplify 2025-08-11 13:34:10 +02:00
Emil J. Tywoniak 97bc0088d8 simplify: std::gcd 2025-08-11 13:34:10 +02:00
Krystine Sherwin d3e33a3be5 simplify.cc: Drop unused debug prints 
At least the ones added by this PR.  There are some unused debug prints that are *changed* by this PR, but I've left them.
 2025-08-11 13:34:10 +02:00
Krystine Sherwin 9b882c32c1 frontends/ast: More usage of auto 
For consistency.
 2025-08-11 13:34:10 +02:00
Emil J. Tywoniak 5b62616b63 preproc: formatting 2025-08-11 13:34:10 +02:00
Emil J. Tywoniak 9a10f4c02f verilog_lexer, verilog_parser: remove comment 2025-08-11 13:34:10 +02:00
Emil J. Tywoniak ae65b4fc84 verilog_lexer: fix fallthrough warning 2025-08-11 13:34:10 +02:00
Emil J 39c5c256c0 verilog_lexer: remove comment 
Co-authored-by: KrystalDelusion <93062060+KrystalDelusion@users.noreply.github.com>
 2025-08-11 13:34:10 +02:00
Emil J. Tywoniak abb8b8d28b preproc: formatting 2025-08-11 13:34:10 +02:00
Emil J. Tywoniak 85b5a7d08b verilog: fix build dependency graph 2025-08-11 13:34:10 +02:00
Gary Wong 4ffd05af6f verilog: add support for SystemVerilog string literals. 
Differences are new escape sequences (including escaped newline
continuations and hex escapes) and triple-quoted literals.
 2025-08-11 13:34:10 +02:00
garytwong 105a3cd32d verilog: fix string literal regular expression (#5187) 
* verilog: fix string literal regular expression.

A backslash was improperly quoted, causing string literal matching
to fail when the final token before a closing quote was an escaped
backslash.

* verilog: add regression test for string literal regex bug.

Test for bug triggered by escaped backslash immediately before
closing quote (introduced in ca7d94af and fixed by 40aa7eaf).
 2025-08-11 13:34:10 +02:00
Emil J. Tywoniak 42b5c14e35 read_verilog, ast: use unified locations in errors and simplify dependencies 2025-08-11 13:34:10 +02:00
Emil J. Tywoniak e6e680cd62 readme, verilog_parser: bison 3.8 and ubuntu 22.04 example 2025-08-11 13:34:10 +02:00
Krystine Sherwin 0f7080ebf8 dpicall.cc: Fix sans-plugin function call 2025-08-11 13:34:10 +02:00
Krystine Sherwin d2573f168d preproc.cc: Use full path for generated file 
Fixes out-of-tree builds.
 2025-08-11 13:34:10 +02:00
Krystine Sherwin 8e89eab9a2 preproc depends on parser 2025-08-11 13:34:10 +02:00
Emil J. Tywoniak 27899180a3 fixup! fixup! ast, read_verilog: unify location types, reduce filename copying 2025-08-11 13:34:10 +02:00
Emil J. Tywoniak 87352f97b2 fixup! ast, read_verilog: unify location types, reduce filename copying 2025-08-11 13:34:10 +02:00
Emil J. Tywoniak ecec9a760b ast, read_verilog: unify location types, reduce filename copying 2025-08-11 13:34:10 +02:00
Emil J. Tywoniak 8bf750ecbb neater errors, lost in the sauce of source 2025-08-11 13:34:10 +02:00
Emil J. Tywoniak b3bf588966 ast, read_verilog: refactoring 2025-08-11 13:34:10 +02:00
Emil J. Tywoniak 84f0c5da73 ast: fix new memory safety bugs from rebase 2025-08-11 13:34:10 +02:00
Emil J. Tywoniak 4a00169452 ast: ownership for string values 2025-08-11 13:34:10 +02:00
Emil J. Tywoniak c8e0ac0c61 ast, read_verilog: ownership in AST, use C++ styles for parser and lexer 2025-08-11 13:34:10 +02:00
Emil J. Tywoniak f27309136f Revert "verilog: fix string literal regular expression (#5187)" 
This reverts commit 834a7294b7.
 2025-08-11 13:34:10 +02:00
Emil J. Tywoniak 36491569d2 Revert "verilog: add support for SystemVerilog string literals." 
This reverts commit 5feb1a1752.
 2025-08-11 13:34:10 +02:00
Emil J. Tywoniak 98b3316f55 Revert "verilog: fix parser "if" memory errors." 
This reverts commit 34a2abeddb.
 2025-08-11 13:34:09 +02:00
KrystalDelusion 7f0e864d44
Merge pull request #5265 from bhagwat-rahul/fix-package-import 
Support package import
 2025-08-08 09:32:54 +12:00
Rahul Bhagwat f12055d3e0
rm debug logs 2025-08-06 15:39:36 -04:00
Rahul Bhagwat 7e0157ba2b
fix whitespace issues 2025-08-06 15:32:36 -04:00
Rahul Bhagwat fe59b6d3db
add safety checks and better name matching 2025-08-04 20:57:43 -04:00
Jannis Harder 75b62d0164 verificsva: Fix typo in the cover only followed-by operator support 2025-08-04 15:38:19 +02:00
Rahul Bhagwat 761015b23e
add separate module test 2025-08-03 23:48:33 -04:00
Rahul Bhagwat b776283d79
implement package import 2025-08-03 23:31:54 -04:00
Miodrag Milanovic f92a53ec31 verific: handle nullptr for message_id 2025-07-30 10:51:54 +02:00
Mike Inouye 0314db80ea Correctly reset Verific flags to Yosys defaults after -import and warn this has occurred. 
Co-authored-by: Chris Pearce <chris@pearce.org.nz>
Signed-off-by: Mike Inouye <mikeinouye@google.com>
 2025-07-25 19:15:01 +00:00
KrystalDelusion 5b8b5292ee
Merge pull request #4959 from YosysHQ/krys/primitive_array_error 
simplify: Skip AST_PRIMITIVE in AST_CELLARRAY
 2025-07-21 10:26:00 +12:00