yosys

Author	SHA1	Message	Date
Akash Levy	0c3446e8af	Fixups for Greptile	2026-06-01 19:03:52 -07:00
Akash Levy	9cc69a3c49	Improvement to opt_balance_tree	2026-06-01 17:56:44 -07:00
Natalia	d5e1647d11	fix tests with truncation issues	2026-01-14 18:03:30 -08:00
Natalia Kokoromyti	8b6925c5b0	Add opt_balance_tree pass for timing optimization This pass converts cascaded chains of arithmetic and logic cells ($add, $mul, $and, $or, $xor) into balanced binary trees to improve timing performance in hardware synthesis. The optimization uses a breadth-first search approach to identify chains of compatible cells, then recursively constructs balanced trees that reduce the critical path depth. Features: - Supports arithmetic cells: $add, $mul - Supports logic cells: $and, $or, $xor - Command-line options: -arith (arithmetic only), -logic (logic only) - Preserves signed/unsigned semantics - Comprehensive test suite with 30 test cases Original implementation by Akash Levy <akash@silimate.com> for Silimate. Upstreamed from https://github.com/Silimate/yosys	2026-01-13 14:20:11 -08:00