16 Commits

Author	SHA1	Message	Date
Krystine Sherwin	82f074880a	symfpu: Use ubv for convert flags	2026-06-06 09:34:46 +12:00
Krystine Sherwin	e9f77001df	symfpu: Convert with flags	2026-06-06 09:34:46 +12:00
Krystine Sherwin	b0f9680fd9	symfpu: Add symfpu_convert ... Convert one input to three outputs (int -> float, float -> int, float -> float). No rounding mode, no flags (yet).	2026-06-06 09:34:46 +12:00
Krystine Sherwin	aa096d4e3f	symfpu: Add -compare mode ... Also `min` and `max` ops. RISC-V uses IEEE 754-2019 semantics where `min(+0,-0) == -0` and `max(+0,-0) == +0` so we do the same here. We could make it optional, but as I understand it the newer behavior is still backwards compatible (since previously it was valid to have selected either).	2026-06-06 09:34:45 +12:00
Krystine Sherwin	e429175533	Add symfpu -classify ... Add description text for standard `symfpu` signature.	2026-06-06 09:34:45 +12:00
Krystine Sherwin	ba5756a1dc	symfpu: Add altsqrt ... No denormalization here. That can be a problem for later (or not at all).	2026-06-06 09:34:44 +12:00
Krystine Sherwin	c6f6baf270	symfpu: Add alt2div ... `altdiv` but without denormalization, because as it turns out HardFloat unpacks subnorms in the same way, so lets just support both styles.	2026-06-06 09:34:44 +12:00
Krystine Sherwin	67a6b10e7b	symfpu: Add altdiv	2026-06-06 09:34:43 +12:00
Krystine Sherwin	29036bc4a0	symfpu: Dynamic rounding mode	2026-06-06 09:34:42 +12:00
Krystine Sherwin	f81d37a67f	symfpu: Tidying output ... Also switching to cleaner library branch	2026-06-06 09:34:42 +12:00
Krystine Sherwin	acd0e5680d	symfpu: floatWithStatusFlags ... Now with verified muladd exceptions.	2026-06-06 09:34:41 +12:00
Krystine Sherwin	58c2c95618	symfpu: Configurable rounding modes ... Including tests, but currently only testing rounding modes on multiply. Also missing the ...01 case.	2026-06-06 09:34:41 +12:00
Krystine Sherwin	c02114af8a	symfpu: Add flags ... Use symfpu fork. Add tests for symfpu properties and extra edge case checking for flags.	2026-06-06 09:34:05 +12:00
Krystine Sherwin	a4bcb0eea4	symfpu: Configurable op	2026-06-06 09:33:00 +12:00
Krystine Sherwin	b3f3fe55e2	symfpu: Configurable eb and sb	2026-06-06 09:33:00 +12:00
Jannis Harder	75822ea17e	wip: symfpu pass	2026-06-06 09:32:59 +12:00