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4535 Commits

Author SHA1 Message Date
Akash Levy 1b13b5d6ea Move segv and reenable loops.v test 2025-02-14 10:02:30 -08:00
Akash Levy fd811ddaee Cleanup 2025-02-14 08:48:27 -08:00
Akash Levy db83aaee09 Clean up muxpack 2025-02-14 06:56:12 -08:00
Akash Levy 8369792e03 Improve extract_reduce further 2025-02-13 21:40:04 -08:00
Alain Dargelas 077b4b854c longloop honors caching 2025-02-13 15:49:18 -08:00
Akash Levy 610d4cc716 Allow extract_reduce to operate on xnors and single-bit word-wide operators 2025-02-12 15:57:28 -08:00
Akash Levy cefce37e59
Merge branch 'YosysHQ:main' into main 2025-02-12 09:01:46 -08:00
Emil J df3c62a4ed
Merge pull request #4892 from YosysHQ/emil/fix-memory-libmap-dangling-cells 
memory_libmap: update indices on design modification
 2025-02-12 10:21:01 +01:00
Emil J. Tywoniak 55b60dca95 memory_libmap: update indices on design modification 2025-02-11 13:32:34 +01:00
Akash Levy 00a37bb318
Merge branch 'YosysHQ:main' into main 2025-02-07 14:25:02 -08:00
Martin Povišer fc88ea360e
Merge pull request #4876 from gadfort/segfault-lexer 
liberty expression lexer check if characters are found and use size if not for `pin()`
 2025-02-07 20:24:08 +01:00
Akash Levy 7977d04148
Merge pull request #51 from alaindargelas/annotate_logic_depth 
Annotate logic depth
 2025-02-06 12:50:08 -08:00
Akash Levy 4e45a86e12
Merge branch 'YosysHQ:main' into main 2025-02-06 12:29:43 -08:00
Martin Povišer 772b9c0cfd
Merge pull request #4691 from hovind/experiments/extract-fa-fix 
extract_fa: Fix `xor3`/`xnor3` inversion bug
 2025-02-06 21:12:32 +01:00
Alain Dargelas bf96f94267 Annotate logic depth 2025-02-05 16:45:08 -08:00
Akash Levy 674075126b Clear selection in pass before doing anything 2025-02-04 23:01:13 -08:00
Akash Levy be77aad820 Add equiv_opt -post 2025-02-04 20:02:55 -08:00
Akash Levy 20c358bce2
Merge branch 'YosysHQ:main' into main 2025-02-04 10:27:16 -08:00
Martin Povišer b5752dfe16 alumacc: Fix missing signedness check 2025-02-04 13:05:53 +01:00
Adrian Parvin Ouano 23b3638c1e alumacc: alternative cmp unification implementation 2025-02-04 11:52:37 +01:00
Alain Dargelas 4a1af2f780 remove not needed code 2025-01-31 16:26:17 -08:00
Alain Dargelas 8213dd1dcf Code review 2025-01-31 15:29:33 -08:00
Alain Dargelas 4861aefcd8 Fix test 2025-01-31 13:28:48 -08:00
Alain Dargelas b4787c787f Calculate cell fanout (post-synthesis) 2025-01-31 10:17:34 -08:00
Akash Levy 66186f11fd
Merge branch 'YosysHQ:main' into main 2025-01-30 14:00:19 -08:00
Øystein Hovind ed076bc168 extract_fa: Invert xor3/xnor3 output when inverting majority3 input 2025-01-30 18:45:07 +01:00
Emil J. Tywoniak c2691207df wreduce: fix warning for deprecated IdString::in(pool<IdString>) 2025-01-30 12:01:30 +01:00
Peter Gadfort 9534f4ab80 check if characters are found and use size if not 2025-01-29 15:56:05 -05:00
Akash Levy 29710e6677 Rename to bus_rebuild 2025-01-27 17:56:24 -08:00
Akash Levy 14f8179e51 Splitcells was missing $aldff 2025-01-27 17:55:19 -08:00
Akash Levy 07a50e4942 Clean up muxpack one-hot sel 2025-01-24 01:39:41 -08:00
Akash Levy 233ba09994 Smallfixes 2025-01-23 14:05:29 -08:00
Akash Levy bd439fc524 Reapply "Merge upstream" 
This reverts commit e73d51dbf0.
 2025-01-23 13:40:32 -08:00
Akash Levy e73d51dbf0 Revert "Merge upstream" 
This reverts commit c58a50f880, reversing
changes made to a1c3c98773.
 2025-01-21 05:28:36 -08:00
Akash Levy c58a50f880 Merge upstream 2025-01-21 04:36:34 -08:00
Peter Gadfort 66545caa1b Merge branch 'main' into synth-flatten 2025-01-20 10:24:38 -07:00
Peter Gadfort f0860459ac add support for using scratchpad value for flatten.separator in flatten command 2025-01-18 10:45:19 -07:00
Akash Levy d8631420a1 Add -nocells option to equiv_make and equiv_opt to ensure that equivalence is only checked for wires 2025-01-16 19:35:22 -08:00
Akash Levy c42fd5164c wreduce already swaps names no need for any diff 2025-01-16 19:34:41 -08:00
Alain Dargelas 2c359f4b58 Fix equiv_opt 2025-01-16 11:31:27 -08:00
Alain Dargelas 088683048b Muxpack does not need splitfanout 2025-01-16 11:16:03 -08:00
N. Engelhardt a5ba1d2eba fix bugs in handling last id in hdlname to scopename conversion 2025-01-16 12:57:08 +01:00
Akash Levy ee7975e4eb Smallfix 2025-01-15 17:33:39 -08:00
Akash Levy ec7b4b74b4 Use our naming convention instead of Yosys' 2025-01-15 17:09:26 -08:00
Alain Dargelas 31a5197a1c muxadd and muldiv_c peepopt 2025-01-15 16:57:19 -08:00
N. Engelhardt d640157ec4 fix some cases of hdlname being added to objects with private names 2025-01-15 15:56:42 +01:00
Akash Levy b545fc4728 Reduce submod verbosity 2025-01-15 02:20:03 -08:00
Alain Dargelas 97928493e5 Fix assert 2025-01-14 11:57:03 -08:00
Alain Dargelas d13c70c3c8 Wire rename 2025-01-14 10:03:54 -08:00
Alain Dargelas 14cfd027b7 opt_balance_tree pass formal equiv 2025-01-14 09:35:43 -08:00