4 Commits

Author	SHA1	Message	Date
Roland Coeurjoly	5780357cd9	Emit valid SMT for stateful designs, fix some cells	2024-08-21 11:02:31 +01:00
Roland Coeurjoly	73ed514623	Check that there are not other solutions other than the first given	2024-08-21 11:02:31 +01:00
Roland Coeurjoly	cb5f08364c	´SMT success only if simulation is equivalent	2024-08-21 11:02:31 +01:00
Roland Coeurjoly	39bf4f04f7	Create VCD file from SMT file	2024-08-21 11:02:31 +01:00