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208 Commits

Author SHA1 Message Date
Akash Levy 5f5ed1b29e Merge upstream yosys 2025-04-21 17:36:24 -07:00
Akash Levy e241c9d513
Merge branch 'YosysHQ:main' into main 2025-04-10 14:28:10 -07:00
Krystine Sherwin 44545653ef
hierarchy: Ignore width mismatch from verific 
But only if it's also a blackbox module with parameters (i.e. it *could* be parametrizable width).
 2025-04-11 04:12:34 +12:00
Krystine Sherwin cd3b914132
Reinstate #4768 
Revert the reversion so that we can fix the bugs that the PR missed.
 2025-04-08 11:58:05 +12:00
Akash Levy 06c614a010
Merge branch 'YosysHQ:main' into main 2025-04-07 07:28:06 -07:00
Miodrag Milanović d49364d96f
Revert "Refactor full_selection" 2025-04-07 12:11:55 +02:00
Akash Levy 0dab4308a3 Actual merge here 2025-04-06 18:53:43 -07:00
Krystine Sherwin dac2bb7d4d
Use selection helpers 
Catch more uses of selection constructor without assigning a design.
 2025-03-14 14:08:13 +13:00
Alain Dargelas 8b928a8274 Fixes to enable keep_hierarchy 2025-03-11 10:26:02 -07:00
Akash Levy e42e196695 Reenable opt_clean in submod 2025-03-05 06:18:38 -08:00
Akash Levy b545fc4728 Reduce submod verbosity 2025-01-15 02:20:03 -08:00
Akash Levy 5c514e00a4 Sync with upstream 2025-01-13 17:20:59 -08:00
Akash Levy 941d78a6ac Make splitnetlist more efficient, no preliminary opt_clean in submod, remove $buf cells in opt_clean 2025-01-10 17:12:15 -08:00
Larry Doolittle 27be9a6b77 keep_hierarchy.cc: use strictly correct syntax for printf of uint64_t values 
Removes two warnings from the compile, at least on amd64 arch
 2025-01-10 14:03:09 -08:00
Akash Levy 4356eae4c9 Yosys sync 2024-12-04 14:16:55 -08:00
Martin Povišer 109d97bb40
Merge pull request #4706 from povik/keep_hierarchy-adjustalgo 
Adjust `keep_hierarchy` behavior
 2024-12-03 12:18:28 +01:00
Martin Povišer 6ad4918121 Account for pre-existing `keep_hierarchy` in cost sum 2024-12-03 11:11:59 +01:00
Martin Povišer c33f7b92f7 Fix typo 2024-12-03 11:11:02 +01:00
Akash Levy 6e88c689f2
Merge branch 'YosysHQ:main' into main 2024-12-01 12:32:07 -05:00
N. Engelhardt 96c526d1ba Print a note about finding attribute (* top *) in hierarchy 2024-11-13 10:21:44 +01:00
Akash Levy 4a5e33520b Remove submod -noclean (unused now) 2024-11-05 10:34:18 -08:00
Martin Povišer c8fffce2b5 keep_hierarchy: Update messages 2024-11-05 09:03:01 +01:00
Martin Povišer cf79630be0 keep_hierarchy: Require size information on blackboxes 2024-11-05 09:02:36 +01:00
Martin Povišer 2425352551 keep_hierarchy: Redo hierarchy traversal for `-min_cost` 2024-11-05 09:02:36 +01:00
Alain Dargelas 4dd26490c2 help message 2024-10-29 13:52:46 -07:00
Alain Dargelas 615f523ef4 pass no_split_complex_ports to hierarchy command 2024-10-29 13:37:03 -07:00
Akash Levy 469f5a707a
Merge branch 'YosysHQ:main' into main 2024-10-14 11:21:54 -07:00
Emil J. Tywoniak 785bd44da7 rtlil: represent Const strings as std::string 2024-10-14 06:28:12 +02:00
Akash Levy c0af4604bc Update Yosys 2024-07-30 16:55:18 -07:00
Emil J. Tywoniak 4b29f64142 cost: add model for techmapped cell count, keep_hierarchy pass with -min_cost parameter 2024-07-29 10:26:02 +02:00
Akash Levy b90c20cd14 Update Verific, add opt to hierarchy pass, make opt run a bunch of Verific optimizations, update some Verific runtime flags 2024-05-27 21:56:08 -07:00
Akash Levy cc5e893db8 Add noclean option to submod for speedup 2024-05-02 06:12:09 -07:00
N. Engelhardt b87327d1b9 fix hierarchy -generate mode handling of cells 2024-04-12 13:38:33 +02:00
Jannis Harder 0470cbb00d hierarchy: Without a known top module, derive all deferred modules 
This fixes hierarchy when used with cell libraries that were loaded with
-defer and also makes more of the hierarchy visible to the auto-top
heuristic.
 2024-02-06 10:31:40 +01:00
Catherine c7bf0e3b8f Add new `$check` cell to represent assertions with a message. 2024-02-01 20:10:39 +01:00
Catherine 3d9e44d182 hierarchy: keep display statements, like formal assertions. 2024-01-22 10:09:22 +00:00
Claire Xenia Wolf a9072dc23c Small bugfix in uniquify pass 
Signed-off-by: Claire Xenia Wolf <claire@clairexen.net>
 2022-12-21 10:41:48 +01:00
Miodrag Milanovic b0be19c126 Support importing verilog configurations using Verific 2022-11-25 13:02:11 +01:00
Miodrag Milanovic 4bc1e1d1f1 Makes sure to set initial_top when change, fixes #3462 2022-08-26 17:12:56 +02:00
KrystalDelusion 9465b2af95 Fitting help messages to 80 character width 
Uses the regex below to search (using vscode):
	^\t\tlog\("(.{10,}(?<!\\n)|.{81,}\\n)"\);

Finds any log messages double indented (which help messages are)
and checks if *either* there are is no newline character at the end,
*or* the number of characters before the newline is more than 80.
 2022-08-24 10:40:57 +12:00
Jannis Harder c0063288d6 Add the $anyinit cell and the formalff pass 
These can be used to protect undefined flip-flop initialization values
from optimizations that are not sound for formal verification and can
help mapping all solver-provided values in witness traces for flows that
use different backends simultaneously.
 2022-08-16 13:37:30 +02:00
Jacob Lifshay c16c028831 add hierarchy -smtcheck 
like -simcheck, but allow smtlib2_module modules.
 2022-06-22 20:53:10 -07:00
Miodrag Milanovic 977002b1d2 Reorder steps in -auto-top to fix synth command, fixes #3261 2022-04-05 14:02:37 +02:00
Zachary Snow e833c6a418 verilog: use derived module info to elaborate cell connections 
- Attempt to lookup a derived module if it potentially contains a port
  connection with elaboration ambiguities
- Mark the cell if module has not yet been derived
- This can be extended to implement automatic hierarchical port
  connections in a future change
 2021-10-25 18:25:50 -07:00
Rupert Swarbrick bd16d01c0e Split out logic for reprocessing an AstModule 
This will enable other features to use same core logic for replacing an
existing AstModule with a newly elaborated version.
 2021-10-25 18:25:50 -07:00
Rupert Swarbrick 7a25246a7e Use new read_id_num helper function elsewhere in hierarchy.cc 2021-07-20 10:13:15 -04:00
Rupert Swarbrick 8fd6b45a3c Extract connection checking logic from expand_module in hierarchy.cc 
No functional change, but pulls more logic out of the expand_module
function.
 2021-07-20 10:13:15 -04:00
Rupert Swarbrick 7d50b83322 Extract missing module support in hierarchy.cc to a helper function 
I think the code is now a bit easier to follow (and has lost some
levels of indentation!).

The only non-trivial change is that I removed the check for
cell->type[0] != '$' when deciding whether to complain if we couldn't
find a module. This will always be true because of the early exit
earlier in the function.
 2021-07-14 22:54:50 -04:00
Rupert Swarbrick e2c9580024 Move interface expansion in hierarchy.cc into a helper class 
There should be no functional change, but this splits up the control
flow across functions, using class fields to hold the state that's
being tracked. The result should be a bit easier to read.

This is part of work to add bind support, but I'm doing some
refactoring in the hierarchy pass to make the code a bit easier to
work with. The idea is that (eventually) the IFExpander object will
hold all the logic for expanding interfaces, and then other code can
do bind insertion.
 2021-06-16 21:48:18 -04:00
Claire Xenia Wolf 72787f52fc Fixing old e-mail addresses and deadnames 
s/((Claire|Xen|Xenia|Clifford)\s+)+(Wolf|Xen)\s+<(claire|clifford)@(symbioticeda.com|clifford.at|yosyshq.com)>/Claire Xenia Wolf <claire@yosyshq.com>/gi;
s/((Nina|Nak|N\.)\s+)+Engelhardt\s+<nak@(symbioticeda.com|yosyshq.com)>/N. Engelhardt <nak@yosyshq.com>/gi;
s/((David)\s+)+Shah\s+<(dave|david)@(symbioticeda.com|yosyshq.com|ds0.me)>/David Shah <dave@ds0.me>/gi;
s/((Miodrag)\s+)+Milanovic\s+<(miodrag|micko)@(symbioticeda.com|yosyshq.com)>/Miodrag Milanovic <micko@yosyshq.com>/gi;
s,https?://www.clifford.at/yosys/,http://yosyshq.net/yosys/,g;
 2021-06-08 00:39:36 +02:00