Commit Graph

16069 Commits

Author SHA1 Message Date
Robert O'Callahan 29810f1e7c Make Const::is_*() functions work on packed bits without decaying to vector<State> 2025-09-16 03:17:24 +00:00
Robert O'Callahan caaf9a4400 Const::decode_string() doesn't need to call bitvectorize 2025-09-16 03:17:24 +00:00
Robert O'Callahan cb1186aac5 Make Const::as_string work without reducing packed bits to vector<State> 2025-09-16 03:17:24 +00:00
Robert O'Callahan f61e3377a9 Hash strings 8 bytes at a time 2025-09-16 03:17:24 +00:00
Robert O'Callahan 67a274ed1f Optimize Const::hash_into to hash packed bits efficiently 2025-09-16 03:17:24 +00:00
Robert O'Callahan 1a367b907c Use fast path for 32-bit Const integer constructor in more places 2025-09-16 03:17:24 +00:00
Robert O'Callahan 9ad83cc67b Fast path for Const::operator== 2025-09-16 03:17:24 +00:00
Robert O'Callahan b597ad777e Make Const::as_bool and Const::as_int work with packed bits without decaying to vector<State> 2025-09-16 03:17:24 +00:00
Robert O'Callahan b06085ab6c Make Const::Const(long long) constructor use packed bits internally if possible 2025-09-16 03:17:24 +00:00
Robert O'Callahan 61caa5e042 Deprecate Const::bitvectorize() 2025-09-16 03:17:23 +00:00
Robert O'Callahan 1e244cd78a Deprecate Const::bits() 2025-09-16 03:17:23 +00:00
Robert O'Callahan 9493292690 Update tests to avoid bits() 2025-09-16 03:17:23 +00:00
Robert O'Callahan 09b493cfcd Update techlibs to avoid bits() 2025-09-16 03:17:23 +00:00
Robert O'Callahan 6dc9a8bacf Update kernel to avoid bits() 2025-09-16 03:17:23 +00:00
Robert O'Callahan 7f247fb125 Update passes/hierarchy to avoid bits() 2025-09-16 03:17:23 +00:00
Robert O'Callahan 159ca3ba56 Update passes/tests to avoid bits() 2025-09-16 03:17:23 +00:00
Robert O'Callahan 8cc86b2643 Update passes/techmap to avoid bits() 2025-09-16 03:17:23 +00:00
Robert O'Callahan d1642bf510 Update passes/sat to avoid bits() 2025-09-16 03:17:23 +00:00
Robert O'Callahan 2d5ce8c363 Update passes/proc to avoid bits() 2025-09-16 03:17:23 +00:00
Robert O'Callahan 5600eb2e5b Update passes/opt to avoid bits() 2025-09-16 03:17:23 +00:00
Robert O'Callahan 23f196a3b8 Update passes/memory to avoid bits() 2025-09-16 03:17:23 +00:00
Robert O'Callahan e1d0c010ef Update passes/fsm to avoid bits() 2025-09-16 03:17:23 +00:00
Robert O'Callahan 1b589b065d Update passes/cmds to avoid bits() 2025-09-16 03:17:23 +00:00
Robert O'Callahan f65ca488ec Update frontends to avoid bits() 2025-09-16 03:17:23 +00:00
Robert O'Callahan 34df6569a6 Update backends to avoid bits() 2025-09-16 03:17:23 +00:00
Robert O'Callahan 662a3df987 Update Const API with alternatives to direct use of bits()
In particular, `Const::resize()`, `Const::set()`, and `Const::iterator`.
2025-09-16 03:17:22 +00:00
Robert O'Callahan 514fb8f901 Fix Const::const_iterator tag to be bidirectional_iterator_tag 2025-09-16 03:17:22 +00:00
Robert O'Callahan 03127173c6 Fix const_iterator postincrement behavior 2025-09-16 03:17:22 +00:00
Robert O'Callahan 8492c49f6c Remove `string_buf` by making `log_signal()` and `log_const()` return `std::string`
We only have to fix one caller in-tree so this probably has very low impact on out-of-tree plugins.

Resolves #5215
2025-09-16 03:06:17 +00:00
github-actions[bot] fe9eed0498 Bump version 2025-09-16 00:22:09 +00:00
Robert O'Callahan 9cb3a239cc Fix `subcircuit` building without `#define _YOSYS_`
We can't use the new stringf functionality with `my_sprintf()` since in some builds
that falls back to C-style varargs.
2025-09-15 23:13:20 +00:00
Jannis Harder 09742e27f7
Merge pull request #5266 from rocallahan/abc-parallel
Run ABC passes in parallel
2025-09-15 18:49:27 +02:00
Emil J 475d455698
Merge pull request #5346 from YosysHQ/emil/verilog-codeowner
CODEOWNERS: add myself for read_verilog and AST
2025-09-15 17:38:00 +02:00
Robert O'Callahan ae0ca7578a Use a pool of ABC processes.
Doing ABC runs in parallel can actually make things slower when every ABC run requires
spawning an ABC subprocess --- especially when using popen(), which on glibc does not
use vfork(). What seems to happen is that constant fork()ing keeps making the main
process data pages copy-on-write, so the main process code that is setting up each ABC
call takes a lot of minor page-faults, slowing it down.

The solution is pretty straightforward although a little tricky to implement.
We just reuse ABC subprocesses. Instead of passing the ABC script name on the command
line, we spawn an ABC REPL and pipe a command into it to source the script. When that's
done we echo an `ABC_DONE` token instead of exiting. Yosys then puts the ABC process
onto a stack which we can pull from the next time we do an ABC run.

For one of our large designs, this is an additional 5x speedup of the primary AbcPass.
It does 5155 ABC runs, all very small; runtime of the AbcPass goes from 760s to 149s
(not very scientific benchmarking but the effect size is large).
2025-09-15 17:22:15 +02:00
Robert O'Callahan 27462da208 Run ABCs in parallel.
Large circuits can run hundreds or thousands of ABCs in a single AbcPass.
For some circuits, some of those ABC runs can run for hundreds of seconds.
Running ABCs in parallel with each other and in parallel with main-thread
processing (reading and writing BLIF files, copying ABC BLIF output into
the design) can give large speedups.
2025-09-15 17:18:42 +02:00
Robert O'Callahan 38f8165c80 Remove direct RTLIL access from gate_t 2025-09-15 17:10:20 +02:00
Robert O'Callahan 222f457a04 Only write out stdcells/lutcosts once for all ABC runs 2025-09-15 17:10:07 +02:00
Robert O'Callahan 13b3418a7f Split `abc_module()` into `prepare_module()` and `run_abc()`
`prepare_module()` will have to run on the main thread.
2025-09-15 17:01:25 +02:00
Emil J. Tywoniak 1c422fcb6e CODEOWNERS: add myself for read_verilog and AST 2025-09-15 16:48:56 +02:00
Emil J 7d82d80a95
Merge pull request #5344 from higuoxing/midrule
verilog_parser: replace manual AST node allocation with typed midrule actions
2025-09-15 16:20:47 +02:00
Claire Xen a2fc7e4dd7
Merge pull request #4252 from zapta/master
Added to the Show command a -wireshape <graphviz-shape> flag.
2025-09-15 15:40:40 +02:00
Emil J 1ed4053d1c
Merge pull request #5337 from YosysHQ/emil/fix-tests-CXX
tests: replace CC and gcc with CXX and g++
2025-09-15 14:35:21 +02:00
Xing Guo 3d2bb1db17 verilog_parser: replace manual AST node allocation with typed midrule actions
Use Bison's typed midrule actions to construct AST_FCALL nodes
with std::unique_ptr, replacing manual 'new' and extra->ast_stack
management. This improves type safety, ensures proper ownership, and
eliminates potential memory leaks.

Ref: https://www.gnu.org/software/bison/manual/html_node/Typed-Midrule-Actions.html
2025-09-13 11:23:42 +08:00
github-actions[bot] fa02d71f65 Bump version 2025-09-13 00:20:53 +00:00
Jannis Harder 193b057983
Merge pull request #5341 from rocallahan/more-varargs-conversion
More varargs conversion
2025-09-12 18:09:42 +02:00
Jannis Harder b87a33d64e
Merge pull request #5211 from rocallahan/remove-log_str
Remove `log_str()` functions and convert their `log_signal()` users t…
2025-09-12 14:10:47 +02:00
Jannis Harder dd9627ed05
Merge pull request #5336 from rocallahan/remove-log-cstr
Remove `.c_str()` calls from `log()`/`log_error()`
2025-09-12 14:09:48 +02:00
Jannis Harder 6d8dfb0750
Merge pull request #5340 from rocallahan/IdString-dead-code
When looking up the IdString table, it can never be empty after we've called prepopulate, so remove some dead code.
2025-09-12 14:07:28 +02:00
Jannis Harder 0ddbb5b36c
Merge pull request #5342 from YosysHQ/jix/workflow-updates
Updates to the CI workflows
2025-09-12 10:46:38 +02:00
Krystine Sherwin 7e1292dd2d CI: brew install autoconf for iverilog 2025-09-12 10:41:01 +02:00