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65 Commits

Author SHA1 Message Date
Maxim Kudinov 6535995005 synth_gowin: fix help hint style 2025-10-16 11:09:28 +01:00
Maxim Kudinov 8c347826f6 synth_gowin: make help description more clear 2025-10-16 11:09:28 +01:00
Maxim Kudinov 8f6d63c082 synth_gowin: make setundef an off by default option 2025-10-16 11:09:28 +01:00
YRabbit 02e40e8118 Gowin. Reduce the range of flip-flop types. 
UG303-1.0E_Arora Ⅴ Configurable Function Unit (CFU) User Guide.pdf
specifies that the only flip-flop types supported in GW5 are DFFSE,
DFFRE, DFFPE, and DFFCE.

However, the bit streams generated by the vendor IDE also contain DFF
flip-flops, which are probably the result of optimisation, so we leave
them in the list of permitted items, but add a flag that will allow the
generation of completely correct output files, acceptable for further P&
R using vendor tools (they will not allow the use of flip-flops other
than the four specified in the netlist).

In the GW5 SemiDual Port BSRAM series, the primitive does not have
RESETA and RESETB ports—they are replaced by the RESET port, so we
separate the files for BSRAM generation, especially since in the future
we may have to take into account other, as yet unexplored, differences
in BSRAM.

Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
 2025-10-11 21:12:35 +10:00
Robert O'Callahan c7df6954b9 Remove .c_str() from stringf parameters 2025-09-01 23:34:42 +00:00
Pepijn de Vos be836f4af3 gowin: split cells_xtra by family 2024-11-26 15:42:22 +01:00
Krystine Sherwin ff10aeebd6
Fix some synth_* help messages 
Mostly memory_libmap arg checks; puts the checks into an else block on the `if (help_mode)` check to avoid cases like `synth_ice40` listing `-no-auto-huge [-no-auto-huge]`.
Also fix `map_iopad` section being empty in `synth_fabulous`.
 2024-03-18 11:33:18 +13:00
Pepijn de Vos f19c6b4415
Enable bram for Gowin 2023-12-03 10:17:28 +01:00
Lofty 309558767d gowin: fix typo 2023-11-14 22:37:29 +00:00
Lofty 7ae4041e20 ice40, ecp5, gowin: enable ABC9 by default 2023-11-13 15:28:13 +00:00
YRabbit a1dd794ff8 gowin: Add all the primitives. 
Use selected data (names, ports and parameters) from vendor file for
GW1N series primitives.

Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
 2023-04-22 17:10:53 +10:00
Pepijn de Vos de07eb11c1
Apicula now supports lutram 2022-07-03 12:45:03 +02:00
Marcelina Kościelnicka 71dfbf33b2 Add -no-rw-check option to memory_dff + memory + synth_{ice40,ecp5,gowin}. 2022-06-02 23:16:12 +02:00
Marcelina Kościelnicka e4d811561c gowin: Use `memory_libmap` pass. 2022-05-18 17:32:56 +02:00
Marcelina Kościelnicka 15b0d717ed iopadmap: Add native support for negative-polarity output enable. 2021-11-09 15:40:16 +01:00
Pepijn de Vos 4bf8deacbb
synth_gowin: move splitnets to after iopadmap (#2435) 2021-11-07 18:00:18 +01:00
Pepijn de Vos a3eec687e0 Remove noalu from synth_gowin json output as Apicula now supports it 2021-11-07 03:04:21 +01:00
Pepijn de Vos 0c7461fe5e
gowin: widelut support (#3042) 2021-11-06 16:09:30 +01:00
Pepijn de Vos c2d358484f
Gowin: deal with active-low tristate (#2971) 
* deal with active-low tristate

* remove empty port

* update sim models

* add expected lut1 to tests
 2021-08-20 21:21:06 +02:00
Claire Xenia Wolf 72787f52fc Fixing old e-mail addresses and deadnames 
s/((Claire|Xen|Xenia|Clifford)\s+)+(Wolf|Xen)\s+<(claire|clifford)@(symbioticeda.com|clifford.at|yosyshq.com)>/Claire Xenia Wolf <claire@yosyshq.com>/gi;
s/((Nina|Nak|N\.)\s+)+Engelhardt\s+<nak@(symbioticeda.com|yosyshq.com)>/N. Engelhardt <nak@yosyshq.com>/gi;
s/((David)\s+)+Shah\s+<(dave|david)@(symbioticeda.com|yosyshq.com|ds0.me)>/David Shah <dave@ds0.me>/gi;
s/((Miodrag)\s+)+Milanovic\s+<(miodrag|micko)@(symbioticeda.com|yosyshq.com)>/Miodrag Milanovic <micko@yosyshq.com>/gi;
s,https?://www.clifford.at/yosys/,http://yosyshq.net/yosys/,g;
 2021-06-08 00:39:36 +02:00
gatecat cae905f551 Blackbox all whiteboxes after synthesis 
This prevents issues like processes in whiteboxes triggering an error in
the JSON backend.

Signed-off-by: gatecat <gatecat@ds0.me>
 2021-03-17 21:07:20 +00:00
Pepijn de Vos f155826a70 add -noalu and -json option for apicula 2020-11-30 11:43:12 +01:00
Marcelina Kościelnicka 9a4f420b4b Replace opt_rmdff with opt_dff. 2020-08-07 13:21:03 +02:00
Marcelina Kościelnicka c73ebeb90e gowin: Use dfflegalize. 2020-07-06 12:27:46 +02:00
Dan Ravensloft 7f45cab27a synth_gowin: ABC9 support 
This adds ABC9 support for synth_gowin; drastically improving
synthesis quality.
 2020-07-05 22:07:17 +02:00
Dan Ravensloft 01772dec8c gowin: replace determine_init with setundef 2020-07-04 23:26:56 +02:00
Marcelina Kościelnicka 88e7f90663 Update dff2dffe, dff2dffs, zinit to new FF types. 2020-06-23 18:24:53 +02:00
whitequark 7191dd16f9 Use C++11 final/override keywords. 2020-06-18 23:34:52 +00:00
Marcelina Kościelnicka 38a0c30d65 Get rid of dffsr2dff. 
This pass is a proper subset of opt_rmdff, which is called by opt, which
is called by every synth flow in the coarse part.  Thus, it never
actually does anything and can be safely removed.
 2020-04-15 16:22:37 +02:00
Diego H 87883f6d88 Removing cells_sim.v from bram techmap pass 2020-02-06 14:38:29 -06:00
Eddie Hung 0b0148399c synth_*: call 'opt -fast' after 'techmap' 2020-02-05 18:39:01 -08:00
Marcelina Kościelnicka 34d2fbd2f9
Add opt_lut_ins pass. (#1673) 2020-02-03 14:57:17 +01:00
whitequark f8d5920a7e
Merge pull request #1604 from whitequark/unify-ram-naming 
Harmonize BRAM/LUTRAM descriptions across all of Yosys
 2020-01-02 21:06:17 +00:00
whitequark 550310e264 Harmonize BRAM/LUTRAM descriptions across all of Yosys. 
This commit:
  * renames all remaining instances of "DRAM" (which is ambiguous)
    to "LUTRAM" (which is not), finishing the work started in
    the commit 698ab9be;
  * renames memory rule files to brams.txt/lutrams.txt;
  * adds/renames script labels map_bram/map_lutram;
  * extracts where necessary script labels map_ffram and map_gates;
  * adds where necessary options -nobram/-nolutram.

The end result is that BRAM/LUTRAM/FFRAM aspects of every target
are now consistent with each other.

Per architecture:
  * anlogic: rename drams.txt→lutrams.txt, add -nolutram, add
    :map_lutram, :map_ffram, :map_gates
  * ecp5: rename bram.txt→brams.txt, lutram.txt→lutrams.txt
  * efinix: rename bram.txt→brams.txt, add -nobram, add :map_ffram,
    :map_gates
  * gowin: rename bram.txt→brams.txt, dram.txt→lutrams.txt,
    rename -nodram→-nolutram (-nodram still recognized), rename
    :bram→:map_bram, :dram→:map_lutram, add :map_ffram, :map_gates
 2020-01-01 12:30:00 +00:00
Eddie Hung c9e3b26412 Disable synth_gowin -abc9 as it offers no advantages yet 2019-12-30 13:28:29 -08:00
Eddie Hung aa6d06c1b5 Revert "Revert "synth_* with -retime option now calls abc with -D 1 as well"" 
This reverts commit 6008bb7002.
 2019-12-30 13:28:29 -08:00
Pepijn de Vos a3b25b4af8 Use -match-init to not synth contradicting init values 2019-12-03 15:12:25 +01:00
Pepijn de Vos 6c79abbf5a gowin: add and test dff init values 2019-11-25 14:33:21 +01:00
Pepijn de Vos 8ab412eb16 Remove dff init altogether 
The hardware does not actually support it.
In reality it is always initialised to its reset value.
 2019-11-19 15:53:44 +01:00
Pepijn de Vos dd8c7e1ddd add help for nowidelut and abc9 options 2019-11-18 14:26:09 +01:00
Pepijn de Vos 0f6269b04c add IOBUF 2019-10-28 15:33:05 +01:00
Pepijn de Vos 903f997391 add tristate buffer and test 2019-10-28 15:18:01 +01:00
Pepijn de Vos 2f5e9e9885 More formatting 2019-10-28 13:10:12 +01:00
Pepijn de Vos c1921b4561 really really fix formatting maybe 2019-10-28 13:01:20 +01:00
Pepijn de Vos 293b2c2de5 undo formatting fuckup 2019-10-28 12:57:12 +01:00
Pepijn de Vos f88335a8a5 add wide luts 2019-10-28 12:49:08 +01:00
Pepijn de Vos 2fb20f184a Revert "add MUX support" 
It turns out that they make everything worse and they don't PnR.

This reverts commit 3eff2271d0.
 2019-09-06 11:28:17 +02:00
Pepijn de Vos 96efa63f16 fix BRAM width and init 2019-09-06 10:55:04 +02:00
Pepijn de Vos 47374a495d support bram initialisation 2019-09-05 17:25:51 +02:00
Pepijn de Vos 7a43be5e43 use singleton ground and vcc nets, apparently this makes pnr happier 2019-09-05 16:38:47 +02:00