Necessary to avoid multiple drivers being inserted when a blackbox has inout ports (like when importing an unknown module with `verific`).
If any bits of an inout port have a known driver, treat the port as an input.
If there are no bits with a known driver, treat the port as an output, and mark each bit as having a driver.
`formatted_help()` introduced the override keyword, which means that the other two methods that were marked as virtual instead raised a warning about inconsistent use of override. This fixes that by bringing the synthprop (more) in line with the rest of the code-base.
Give formal index a proper title.
Use `Pass::formatted_help()` to assign the group, but still return `false` because the help text still comes from `Pass::help()`.
Tidy up some of the affected files' includes to make use of the shared `yosys.h` includes.
Calling `throw dst_end_of_data_exception()` when the desired number of cycles has been reached means that the fst reader can't tidy up after itself and leads to memory leaks.
This doesn't happen when the `-stop` flag is used because the `Yosys::FstData` struct tracks the end time and skips the outer callback if the simulation has gone past the desired end time.
Move cycle checking into the inner callback along with the time checking means that the outer callback no longer needs to throw an exception in order to stop checking further values, while still allowing the fst reader to finish reading and deallocate memory.
libfst is no longer included in gtkwave and instead has its own repo. There has also been some refactoring, so the patches need to update to match, as does sim.cc.
Instead, change the default `Design::selected_modules()` to match the behaviour (i.e. `selected_unboxed_modules_warn()`) because it's a lot of files to touch and they don't really _need_ to be updated.
Also change `Design::selected_whole_modules()` users over to `Design::selected_unboxed_whole_modules()`, except `attrmap` because I'm not convinced it should be ignoring boxes. So instead, leave the deprecation warning for that one use and come back to the pass another time.
* this attempts to rewrite clock gating patterns into a form that is
less likely to introduce combinational loops with clk2fflogic
* can be disabled with -nopeepopt which is useful for testing
clk2fflogic
Jannis Harder
Miodrag Milanovic
KrystalDelusion
Emil J
Robert O'Callahan
N. Engelhardt
Martin Povišer
Emily Schmidt
George Rennie