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796 Commits

Author SHA1 Message Date
clemens 21b93ee1fb fix sequential area not being included in addition/multiplication 
Fixes a bug where the sequential area isn't part of the Stat_numeric_members that are used to automatically add/mul the statdata_t members.
 2025-04-15 09:38:04 +02:00
Krystine Sherwin 237e454131
design.cc: Fix selections when copying 
Use `Design::selected_modules()` directly, popping at the end instead of copying the selection.
Also default to a complete selection so that boxes work as before.
Simplify to using `RTLIL::SELECT_WHOLE_CMDERR` instead of doing it manually.
Also add tests for importing selections with boxes.
 2025-04-08 16:35:12 +12:00
Krystine Sherwin 911a3ae759
setattr.cc: Use new selection helpers 
Also test they work as expected.
 2025-04-08 15:34:48 +12:00
Krystine Sherwin dbc2611dd6
test_select: Add and exercise test_select pass 
Developer facing, intended to check internal selection semantics work as expected.  i.e. it would have revealed the bug in the now reverted PR.
 2025-04-08 11:59:45 +12:00
Krystine Sherwin cd3b914132
Reinstate #4768 
Revert the reversion so that we can fix the bugs that the PR missed.
 2025-04-08 11:58:05 +12:00
Jannis Harder 0f13b55173 Liberty file caching with new `libcache` command 
This adds optional in-memory caching of parsed liberty files to speed up
flows that repeatedly parse the same liberty files. To avoid increasing
the memory overhead by default, the caching is disabled by default. The
caching can be controlled globally or on a per path basis using the new
`libcache` command, which also allows purging cached data.
 2025-04-03 13:39:35 +02:00
Emil J ec8b745929
Merge pull request #4733 from antmicro/fix-setundef-pass-for-params 
Fix setting bits of parameters in setundef pass
 2025-03-28 13:06:04 +01:00
Emil J b9131853ff
Merge pull request #4954 from YosysHQ/krys/abstract_default_val 
Fixes for abstract.cc
 2025-03-26 10:40:37 +01:00
KrystalDelusion b06a661913
Merge pull request #4834 from YosysHQ/emil/gzip-refactor 
Memory-efficient zlib usage across Liberty file consumers
 2025-03-21 10:01:00 +13:00
Krystine Sherwin d704ca8019
abstract: Fix indentation 2025-03-20 17:20:36 +13:00
Krystine Sherwin 452dd1b74b
abstract: Assign default to value 
Fix `-Wmaybe-uninitialized` on line 43 and 44.
 2025-03-20 17:19:22 +13:00
Emil J. Tywoniak 199702a392 dft_tag: fix autoNot not notting 2025-03-19 18:28:50 +01:00
Emil J. Tywoniak 980a0a15c1 stat: allow gzipped liberty files 2025-03-19 13:43:44 +01:00
Anhijkt de032d2e2a splitcells: change for-loop condition 2025-02-28 23:16:04 +02:00
Anhijkt 9a14ab8d98 splitcells: Fix the assertion bug caused by out-of-bound offset 2025-02-28 13:51:22 +02:00
Martin Povišer bca21c60d8
Merge pull request #4902 from akashlevy/splitcells_aldff_fix 
`aldff`s do not get split by `splitcells` pass
 2025-02-27 00:56:46 +01:00
Emil J. Tywoniak 07004f1089 abstract: typo? 2025-02-25 00:19:15 +01:00
Emil J. Tywoniak 925c617c52 abstract: add module input -value abstraction 2025-02-18 17:08:45 +01:00
Jannis Harder 212224dfe8 abstract: Add help message 2025-02-18 17:08:45 +01:00
Jannis Harder 2943c2142d abstract: Improve debug logging 
Print the port bit instead of the arbitrary representative sigbit to
identify the target of the abstraction operation.
 2025-02-18 17:08:45 +01:00
Jannis Harder a0987195f2 abstract: Support slicing of individual wires 2025-02-18 17:08:45 +01:00
Jannis Harder 4766c92e59 abstract: Allow unconditional value and state abstractions 
Also improves -enable and -enablen command line handling
 2025-02-18 17:08:45 +01:00
Jannis Harder 37aa2e6cd8 abstract: Wire vs port offset confusion bugfix 
This fixes the offsets_to_abstract collection in abstract_state so that
it now works the same way as in abstract_value which was already
correct.
 2025-02-18 17:08:45 +01:00
Emil J. Tywoniak 28c768e7b8 abstract: better present changes done 2025-02-18 17:08:45 +01:00
Emil J. Tywoniak 3dd697fc8a abstract: improve -init logging 2025-02-18 17:08:45 +01:00
Emil J. Tywoniak 9de890c874 abstract: fix -init log_debug bit count, remove unnecessary log_debug 2025-02-18 17:08:45 +01:00
Emil J. Tywoniak aca4d44a40 abstract: improve debug logs for -state and -value 2025-02-18 17:08:45 +01:00
Emil J. Tywoniak cee06cecd0 abstract: factor out emit_mux_anyseq 2025-02-18 17:08:45 +01:00
Emil J. Tywoniak 9895370b32 abstract: rework -init without bufnorm, with logging 2025-02-18 17:08:45 +01:00
Emil J. Tywoniak 1646991092 abstract: refactor -value 2025-02-18 17:08:45 +01:00
Emil J. Tywoniak e9bba13a0d abstract: no more bufnorm, -value has bit selection consistent with -state, -init temporarily gutted 2025-02-18 17:08:45 +01:00
Emil J. Tywoniak 3f1ee3e0ae abstract: -state refactor sigbit rep pool collection 2025-02-18 17:08:45 +01:00
Emil J. Tywoniak 387d0de383 abstract: -state allow partial abstraction, don't use buffer-normalized mode 2025-02-18 17:08:45 +01:00
Emil J. Tywoniak 6027030215 abstract: -value MVP, use buffer-normalized mode 2025-02-18 17:08:45 +01:00
Emil J. Tywoniak 4637fa74e3 abstract: -init MVP 2025-02-18 17:08:45 +01:00
Emil J. Tywoniak e4ca7b8846 abstract: -state MVP 2025-02-18 17:08:45 +01:00
Akash Levy 3676429634 `aldff`s do not get split by splitcells 2025-02-14 10:53:51 -08:00
Emil J. Tywoniak a58481e9b7 mark all hash_into methods nodiscard 2025-01-14 12:39:15 +01:00
Emil J. Tywoniak b9b9515bb0 hashlib: hash_eat -> hash_into 2024-12-18 15:09:25 +01:00
Emil J. Tywoniak 4e29ec1854 hashlib: acc -> eat 2024-12-18 15:09:25 +01:00
Emil J. Tywoniak c73c88033d hashlib: only include in one place 2024-12-18 14:58:31 +01:00
Emil J. Tywoniak d071489ab1 hashlib: redo interface for flexibility 2024-12-18 14:49:25 +01:00
Martin Povišer 4bd6061709
Merge pull request #4799 from povik/wrapcell-unused 
wrapcell: Optionally track unused outputs
 2024-12-10 21:16:28 +01:00
Martin Povišer 3cd01a57cd wrapcell: Add comments, const qualifier 2024-12-10 15:13:31 +01:00
Martin Povišer 9161377c5a wrapcell: Fix help 2024-12-09 15:40:33 +01:00
Martin Povišer 481162b848
Merge pull request #4800 from povik/portarcs-fix 
Fix portarcs edge cases
 2024-12-09 15:13:15 +01:00
N. Engelhardt 8557455411 handle quotes and check return value 2024-12-06 11:25:45 +01:00
Miodrag Milanovic 1b403b82d7 Handle setting environment on Windows 2024-12-06 11:25:45 +01:00
N. Engelhardt 8b0f665cc5 add setenv pass 2024-12-06 11:25:43 +01:00
Martin Povišer f4f65493a1 portarcs: Fix confusing disconnected and zero-delay case 2024-12-05 18:27:44 +01:00
Martin Povišer 2c66557d22 portarcs: Fix for case of unused gates 2024-12-05 18:27:43 +01:00
Martin Povišer d57d21e566 wrapcell: Optionally track unused outputs 2024-12-05 18:16:53 +01:00
Martin Povišer 79e9258a31 wrapcell: Add new command 2024-11-27 14:01:00 +01:00
Martin Povišer 2dba345049 portarcs: New command to derive propagation arcs 2024-11-13 16:20:35 +01:00
Martin Povišer 4ce8c7a0d3
Merge pull request #4709 from YosysHQ/emil/idstring-in-fold 
functional, glift: use fold overload of IdString::in instead of pool …
 2024-11-13 15:17:33 +01:00
mszelwiga 8e508f2a2a Fix setting bits of parameters in setundef pass 
This commit also adds test that verifies correctness of this change.
 2024-11-08 17:03:08 +01:00
Emil J. Tywoniak 387a235158 functional, glift: use fold overload of IdString::in instead of pool literals 2024-11-06 12:48:32 +01:00
Martin Povišer 29af057430
Merge pull request #4707 from povik/stat-unused 
stat: Drop unused field
 2024-11-05 09:38:29 +01:00
Martin Povišer 4df3a5d7ec stat: Drop unused field 2024-11-05 09:37:35 +01:00
Martin Povišer 35a20da512 logger: Adjust print 2024-11-04 13:16:40 +01:00
Martin Povišer 7aa3fdab80 select: Add `-list-mod` option 2024-11-04 13:16:13 +01:00
Lofty dd7ea0ab6c qwp: remove 2024-10-25 14:09:58 +01:00
Martin Povišer 9432e972f7
Merge pull request #4626 from povik/select-t-at 
select: Add new `t:@<name>` syntax
 2024-10-16 10:18:05 +02:00
Martin Povišer 09be0351ce select: Add new `t:@<name>` syntax 2024-10-15 12:22:02 +02:00
Emil J. Tywoniak 785bd44da7 rtlil: represent Const strings as std::string 2024-10-14 06:28:12 +02:00
Miodrag Milanovic f079772ade Add TODO for missing help messages 2024-10-08 08:47:51 +02:00
Mike A. 95a2099c90
Allow whitespace in `tee` command paths 2024-09-29 17:15:59 +02:00
N. Engelhardt 8e1e2b9a39
Merge pull request #4495 from povik/check-avert-costly-detail 2024-09-23 15:19:48 +02:00
N. Engelhardt c8b42b7d48
Merge pull request #4538 from RCoeurjoly/verific_bounds 2024-09-12 13:04:04 +02:00
Martin Povišer 34572708d5
Merge pull request #4595 from YosysHQ/emil/internal_stats-astnode 
internal_stats: astnode (sizeof)
 2024-09-11 12:21:29 +02:00
Emil J. Tywoniak 1372c47036 internal_stats: astnode (sizeof) 2024-09-11 11:34:20 +02:00
Roland Coeurjoly bdc43c6592 Add left and right bound properties to wire. Add test. Fix printing 
for signed attributes

Co-authored-by: N. Engelhardt <nak@yosyshq.com>
Co-authored-by: Roland Coeurjoly <rolandcoeurjoly@gmail.com>
 2024-09-10 12:52:42 +02:00
Hoa Nguyen c1205ebc42 Initialize area stats in stat pass 
Currently, the area variables in the stat struct are not initialized.
This caused the area stats occasionally being an erroneous value.

Signed-off-by: Hoa Nguyen <hnpl@google.com>
 2024-09-07 21:30:58 -07:00
Miodrag Milanović b20df72e1e
Merge pull request #4536 from YosysHQ/functional 
Functional Backend
 2024-09-06 10:05:04 +02:00
Emil J. Tywoniak 14b9155492 internal_stats: fix doc build by adding a help string 2024-09-05 11:22:21 +02:00
Emil J. Tywoniak 0ce7631956 internal_stats: init, report current memory consumption on linux and mac 2024-09-03 19:28:24 +02:00
Emily Schmidt 850b3a6c29 convert class FunctionalIR to a namespace Functional, rename functionalir.h to functional.h, rename functional.h to compute_graph.h 2024-08-21 11:04:08 +01:00
Emily Schmidt 8c0f625c3a functional backend: topological sort starts with the output and next states nodes, other nodes get deleted 2024-08-21 11:03:29 +01:00
Emily Schmidt dd5ec84a26 fix bugs in drivertools 2024-08-21 11:01:09 +01:00
Jannis Harder d4e3daa9d0 ComputeGraph datatype for the upcoming functional backend 2024-08-21 11:01:09 +01:00
Jannis Harder 68c3a47945 WIP temporary drivertools example 2024-08-21 11:01:08 +01:00
Martin Povišer 3057c13a66 Improve libparse encapsulation 2024-08-13 18:47:36 +02:00
Martin Povišer 4c3203866f exec: Add missing newline 2024-08-07 13:02:00 +02:00
Emil J. Tywoniak 4b29f64142 cost: add model for techmapped cell count, keep_hierarchy pass with -min_cost parameter 2024-07-29 10:26:02 +02:00
Martin Povišer 0cefe8a1e8 check: Skip detailed edge modeling if costly 2024-07-18 13:08:19 +02:00
Martin Povišer e70b1251ad check: Adjust prints 2024-07-18 13:08:19 +02:00
Martin Povišer 3f71bc469d check: Rephrase comment 2024-07-18 13:08:19 +02:00
Miodrag Milanovic 9b82a44d25 Fix help message typo 2024-06-07 08:26:59 +02:00
Martin Povišer 4b67f3757f
Merge pull request #4404 from YosysHQ/povik/bbox_derive 
box_derive: New command to derive modules for boxes
 2024-05-31 19:09:18 +02:00
Martin Povišer b230c95cc4 select: Adjust help 2024-05-29 20:41:56 +02:00
Martin Povišer 49906be776 select: Introduce `-assert-mod-count` 2024-05-21 16:34:38 +02:00
Martin Povišer adc1a01490 select: Refactor some flag validation 2024-05-21 16:29:20 +02:00
Martin Povišer c0a196173a Rename `bbox_derive` to `box_derive` 2024-05-21 16:18:03 +02:00
Martin Povišer 5c929a91c2 bbox_derive: Write help 2024-05-21 14:57:37 +02:00
Martin Povišer 88af059fad bbox_derive: Fix `done` base type confusion 2024-05-21 14:57:26 +02:00
Emil J. Tywoniak 44b0fdc2bf bbox_derive: add assert and debug print 2024-05-03 20:43:01 +02:00
Emil J. Tywoniak e8c58a5528 bbox_derive: fix unininitialized memory UB when run with no named args 2024-05-03 20:41:42 +02:00
Martin Povišer 4c000d3aba Add new `bbox_derive` command for blackbox derivation 2024-05-03 20:39:11 +02:00
Martin Povišer b00abe4a26 Extend `log` command with `-push`, `-pop`, `-header` options 2024-04-10 11:49:20 +02:00
Martin Povišer 47931f9050
Merge pull request #4295 from gadfort/add-ports-stat 
add port statistics to stat command
 2024-04-08 11:12:02 +02:00
Peter Gadfort 160e3e089a add port statistics to stat command 2024-03-22 09:20:20 -04:00
Martin Povišer 206d894c56 check: Omit private wires in loop report 2024-03-11 10:45:36 +01:00
Martin Povišer d01728aaa5 celledges: Register async FF paths 2024-03-11 10:45:36 +01:00
Martin Povišer 4fdcf388d3 check: Assert edges data is not out-of-bounds 2024-03-11 10:45:17 +01:00
Martin Povišer b6112b3551 check: Consider read ports in loop detection 2024-03-11 10:45:17 +01:00
Martin Povišer fa74d0bd1a check: Use cell edges data in detecting combinational loops 2024-03-11 10:43:49 +01:00
Martin Povišer c5ae74af34 check: Improve found loop logging 
Print the detected loop in-order, and include source location for each
node, if available.
 2024-03-11 10:43:49 +01:00
Jannis Harder d8cdc213a6 rename -witness: Bug fix and rename formal cells 
Rename formal cells in addition to witness signals. This is required to
reliably track individual property states for the non-smtbmc flows.

Also removes a misplced `break` which resulted in only partial witness
renaming.
 2024-03-04 16:53:03 +01:00
Zapta 672c89498a Added to the Show command a -wireshape <graphviz-shape> flag. 
This allows to control the shape of wire nodes, for example, -wireshape plaintext.
The motivation is to allow the user to reduce visual loads of wires.
This does not change the default behavior of using a diamond shape.
 2024-03-02 11:20:53 -08:00
Miodrag Milanović a3c81f4d62
Merge pull request #4216 from YosysHQ/show_href 
show: Add option to add cell/wire "src" attribute into graphviz attribute href
 2024-02-19 20:50:53 +01:00
N. Engelhardt 4b99db0b73
Merge pull request #4177 from povik/connect-extra_args 
connect: Do interpret selection arguments
 2024-02-19 15:18:37 +01:00
Ethan Mahintorabi b8a1009de9
Update passes/cmds/stat.cc 
Make reporting line more clear about the non cumulative area of sequential cells

Co-authored-by: N. Engelhardt <nakengelhardt@gmail.com>
 2024-02-16 07:44:09 -08:00
Ethan Mahintorabi f0df0e3912
update type and variable names 
Signed-off-by: Ethan Mahintorabi <ethanmoon@google.com>
 2024-02-16 00:01:44 +00:00
Ethan Mahintorabi 2d8343d423
update type and variable names 
Signed-off-by: Ethan Mahintorabi <ethanmoon@google.com>
 2024-02-15 23:59:19 +00:00
Miodrag Milanovic 834276a2f7 show: Add option to add cell/wire "src" attribute into graphviz attribute href 2024-02-14 09:50:53 +01:00
Ethan Mahintorabi 8566489d85
stat: Add sequential area output to stat -liberty 
Checks to see if a cell is of type ff in the liberty,
and keeps track of an additional area value.

```
   Chip area for module '\addr': 92.280720
   Sequential area for module '\addr': 38.814720
```

Signed-off-by: Ethan Mahintorabi <ethanmoon@google.com>
 2024-02-09 23:51:00 +00:00
Claire Xen 1b73b5beb7
Merge pull request #4174 from YosysHQ/claire/overwrite 
Add API to overwrite existing pass from plugin
 2024-02-05 23:49:24 +01:00
Jannis Harder 6c4902313b chformal: Support $check cells and add chformal -lower 
This adds support for `$check` cells in chformal and adds a `-lower`
mode which converts `$check` cells into `$assert` etc. cells with a
`$print` cell to output the `$check` message.
 2024-02-01 20:10:39 +01:00
Martin Povišer a84fa0a277 connect: Do interpret selection arguments 
Instead of silently ignoring what would ordinarily be the selection
arguments to a pass, interpret those and mark the support in the help
message.
 2024-02-01 10:28:36 +01:00
Claire Xenia Wolf 4fa314c0bd Add API to overwrite existing pass from plugin 
Signed-off-by: Claire Xenia Wolf <claire@clairexen.net>
 2024-01-30 17:51:11 +01:00
Stephen Tong b3e7390c0e
Fix typo in stat help 2024-01-21 16:32:05 -05:00
N. Engelhardt fb4eeb1344 show: allow setting colors via selection on PROC boxes 2024-01-15 17:47:59 +01:00
Lofty d21c464ae4
Merge pull request #3946 from rmlarsen/toposort 
Speed up TopoSort by 2.7-3.3x.
 2023-10-17 13:00:18 +01:00
Marcus Comstedt 0ca39e233b scc: Use hashlib instead of STL for deterministic behaviour 2023-10-07 10:43:00 +02:00
Rasmus Munk Larsen 0a37c2a301 Fix translation bug: The old code really checks for the presense of a node, not an edge in glift and flatten. 
Add back statement that inserts nodes in order in opt_expr.cc.
 2023-10-05 17:01:42 -07:00
Jannis Harder 5daa49bafb dft_tag: Fix size extending $x[n]or and $reduce_{or,bool}/$logic_not 2023-09-28 17:33:55 +02:00
N. Engelhardt 3319fdc46e show: use dot for wire aliases instead of BUF 2023-09-25 17:20:16 +02:00
Rasmus Munk Larsen 9ed38bf9b6
Speed up the autoname pass by 3x. (#3945) 
* Speed up the autoname pass by 2x. This is accomplished by only constructing IdString objects for plain strings that have a higher score.

* Defer creating IdStrings even further. This increases the speedup to 3x.
 2023-09-21 09:46:49 +00:00
Rasmus Munk Larsen e0042bdff7 Speed up TopoSort. The main sorting algorithm implementation in TopoSort::sort_worker is 11-12x faster. Overall, the complete sequence of building the graph and sorting is about 2.5-3x faster. The overall impact in e.g. the replace_const_cells optimization pass is a ~25% speedup. End-to-end impact on our synthesis flow is about 3%. 2023-09-20 15:49:05 -07:00
Jannis Harder 62b4df4989 dft_tag: Implement `$overwrite_tag` and `$original_tag` 
This does not correctly handle an `$overwrite_tag` on a module output,
but since we currently require the user to flatten the design for
cross-module dft, this cannot be observed from within the design, only
by manually inspecting the signals in the design.
 2023-09-13 11:32:36 +02:00
Jannis Harder 46a35da28c Add `future` pass to resolve `$future_ff` cells 2023-09-13 11:32:36 +02:00
Jannis Harder 7a0c37b62d Initial dft_tag implementation 
This is still missing a mode to rewrite $overwrite_tag and $original_tag
by injecting $set_tag and $get_tag in the right places. It's also
missing bit-precise propagation models for shifts and arithmetic and
requires the design to be flattened.
 2023-09-13 11:32:36 +02:00
Jannis Harder e187fc915e xprop: Fix polarity errors and generate hdlnames 
* Fixes a non-deterministic polarity error for $eqx/$nex cells
* Fixes a deterministic polarity error for $_NOR_ and $_ORNOT_ cells
* Generates hdlnames when xprop is run after flatten
 2023-09-06 19:25:47 +02:00
Jannis Harder a07f8ac38a check: Also check for conflicts with constant drivers 2023-06-23 18:07:28 +02:00
N. Engelhardt 9c7f0e7670 show: truncate very long module names 2023-06-20 12:53:56 +02:00
N. Engelhardt 22c9237716 show: escape angle brackets 2023-06-20 11:17:12 +02:00
N. Engelhardt 7c606bd5a3
Merge pull request #3791 from nakengelhardt/nak/show_attr_wires 2023-06-05 16:18:54 +02:00
N. Engelhardt 0707b911c7 show: add -viewer none option 2023-06-01 11:00:07 +02:00
N. Engelhardt 4b986c9c65 fix wire color after BUF 2023-05-31 17:38:46 +02:00
N. Engelhardt 26555a998d show -colorattr: extend colors to arrows when wires have attribute 2023-05-26 17:18:21 +02:00
Jannis Harder e36c71b5b7 Use clk2fflogic attr on cells to track original FF names in witnesses 
This makes clk2fflogic add an attr to $ff cells that carry the state of
the emulated async FF. The $ff output doesn't have any async updates
that happened in the current cycle, but the $ff input does, so the $ff
input corresponds to the async FF's output in the original design.

Hence this patch also makes the following changes to passes besides
clk2fflogic (but only for FFs with the clk2fflogic attr set):

  * opt_clean treats the input as a register name (instead of the
    output)

  * rename -witness ensures that the input has a public name

  * the formal backends (smt2, btor, aiger) will use the input's
    name for the initial state of the FF in witness files

  * when sim reads a yw witness that assigns an initial value to the
    input signal, the state update is redirected to the output

This ensures that yosys witness files for clk2fflogic designs have
useful and stable public signal names. It also makes it possible to
simulate a clk2fflogic witness on the original design (with some
limitations when the original design is already using $ff cells).

It might seem like setting the output of a clk2fflogic FF to update the
input's initial value might not work in general, but it works fine for
these reasons:

  * Witnesses for FFs are only present in the initial cycle, so we do
    not care about any later cycles.

  * The logic that clk2fflogic generates loops the output of the
    genreated FF back to the input, with muxes in between to apply any
    edge or level sensitive updates. So when there are no active updates
    in the current gclk cycle, there is a combinational path from the
    output back to the input.

  * The logic clk2fflogic generates makes sure that an edge sensitive
    update cannot be active in the first cycle (i.e. the past initial
    value is assumed to be whatever it needs to be to avoid an edge).

  * When a level sensitive update is active in the first gclk cycle, it
    is actively driving the output for the whole gclk cycle, so ignoring
    any witness initialization is the correct behavior.
 2023-05-25 12:48:02 +02:00
Miodrag Milanović 226a224640
Merge pull request #3749 from lethalbit/aki/plugin-stuff 
Updated the `plugin` command to better handle paths
 2023-05-09 08:46:02 +02:00
Aki Van Ness bb240665b7
plugin: shuffled the `#ifdef WITH_PYTHON`'s around to un-tangle the code and pulled out the check for the `.py` extension so it will complain if you try to load a python extension without python support 2023-05-03 03:35:55 -04:00
Aki Van Ness 572c8df9a8
plugin: Re-vamped how plugin lookup was done to make it more consistent with the rest of yosys, and prevented a case where you could end up with `.so.so` on the end 2023-05-03 02:22:46 -04:00
Jannis Harder 7bff8b63b3 rename: Fix renaming cells in -witness mode 
This was renaming cells while iterating over them which would always
cause an assertion failure. Apparently having to rename cells to make
all witness signals public is rarely required, so this slipped through.
 2023-04-25 12:39:00 +02:00
N. Engelhardt 57897927ff stat: pass down quiet arg 2023-02-28 17:12:55 +01:00
Jannis Harder ec94703619
Merge pull request #2995 from georgerennie/cover_precond 
chformal: Add -coverenable option
 2023-02-14 17:46:31 +01:00
Jannis Harder b636af9751 chformal: Note about using -coverenable with the Verific frontend 2023-02-14 17:10:43 +01:00
N. Engelhardt 417fadbefd
Merge pull request #3625 from povik/show_cleanup 2023-02-06 16:11:26 +01:00
Miodrag Milanović 8180cc4325
Merge pull request #3624 from jix/sim_yw 
Changes to support SBY trace generation with the sim command
 2023-01-23 16:55:17 +01:00