Commit Graph

490 Commits

Author SHA1 Message Date
Catherine c7bf0e3b8f Add new `$check` cell to represent assertions with a message. 2024-02-01 20:10:39 +01:00
Martin Povišer 149bcd88ad
Merge pull request #4026 from uis246/fix-format
Fix printf formats
2024-01-15 16:04:11 +01:00
uis 5902b2826d Fix printf formats 2024-01-15 12:07:54 +01:00
Dag Lem 3ed9030eb4 Optionally suppress output from display system tasks in read_verilog 2024-01-11 13:12:53 +01:00
Jannis Harder 510d137996 fmt: Allow non-constant $display calls in initial blocks
These are useful for formal verification with SBY where they can be used
to display solver chosen `rand const reg` signals and signals derived
from those.

The previous error message for non-constant initial $display statements
is downgraded to a log message. Constant initial $display statements
will be shown both during elaboration and become part of the RTLIL so
that the `sim` output is complete.
2024-01-11 13:01:28 +01:00
Dag Lem 23cd23efc5 Simplify and correct AST for array slice assignment
Corrects sign extension of the right hand side, and hopefully
makes the code simpler to understand.

Fixes #4064
2024-01-10 21:15:00 +01:00
Dag Lem 1a2b4759e8 Assign from rvalue via temporary register in nowrshmsk CASE
Avoid repeating complex rvalue expressions for each condition.
2024-01-10 20:40:01 +01:00
Dag Lem 2cab4ff173 Correction and optimization of nowrshmsk
This makes tests/verilog/dynamic_range_lhs.v pass, after ensuring that
nowrshmsk is actually tested.

Stride is extracted from indexing of two-dimensional packed arrays and
variable slices on the form dst[i*stride +: width] = src, and is used
to optimize the generated CASE block.

Also uses less confusing variable names for indexing of lhs wires.
2024-01-10 20:28:36 +01:00
Dag Lem 1bbea13f80 Correct hierarchical path names for structs and unions 2024-01-04 17:22:07 +01:00
Martin Povišer 8367f06188 ast/simplify: Remove unused in_param code 2023-10-05 22:42:36 -04:00
Jannis Harder cc843d414f simplify: Avoid calling fixup_hierarchy_flags on nullptr
Compiling on GCC hid this bug as it optimized the nullptr call away as
undefined behavior, but running the SBY tests with a clang build hits
this error.
2023-09-29 12:28:50 +02:00
Martin Povišer a511976b48 ast/simplify: Retire in_lvalue/in_param arguments to simplify 2023-09-26 13:32:15 +02:00
Martin Povišer 22b99413e8 ast/simplify: Make in_lvalue/in_param into props of AST nodes
Instead of passing around in_lvalue/in_param flags to simplify, we make
the flags into properties of the AST nodes themselves. After the tree
is first parsed, we once do

  ast->fixup_hierarchy_flags(true)

to walk the full hierarchy and set the flags to their initial correct
values. Then as long as one is using ->clone(), ->cloneInto() and the
AstNode constructor (with children passed to it) to modify the tree, the
flags will be kept in sync automatically. On the other hand if we are
modifying the children list of an existing node, we may need to call

  node->fixup_hierarchy_flags()

to do a localized fixup. That fixup will update the flags on the node's
children, and will propagate the change down the tree if necessary.

clone() doesn't always retain the flags of the subtree being cloned. It
will produce a tree with a consistent setting of the flags, but the
root doesn't have in_param/in_lvalue set unless it's intrinsic to the
type of node being cloned (e.g. AST_PARAMETER). cloneInto() will make
sure the cloned subtree has the flags consistent with the new placement
in a hierarchy.

Add asserts to make sure the old and new way of determining the flags
agree.
2023-09-26 13:32:15 +02:00
Martin Povišer 10d0e69588 ast/simplify: Make tweaks in advance of big in_lvalue/in_param change
The following commit will replace the way in_lvalue/in_param is being
tracked in the simplify code. Make tweaks in advance so that it will
be easier to make the old way and the new way agree.

These changes all should be innocuous.
2023-09-26 13:31:59 +02:00
Charlotte 9f9561379b fmt: format %t consistently at initial 2023-08-11 04:46:52 +02:00
whitequark d5c9953c09 ast: translate $display/$write tasks in always blocks to new $print cell. 2023-08-11 04:46:52 +02:00
whitequark 9f8e039a4b ast: use new format string helpers. 2023-08-11 04:46:52 +02:00
Zachary Snow d5d2bf815a Fix semantic merge conflict in previous two merged PRs 2023-07-21 00:08:10 -04:00
Martin Povišer 72a4022a10 ast/simplify: Retire 'at_zero' flag
Now that all the callsites pass in 'false' for the flag (or propagate
the flag on recursion), we can retire it.
2023-07-20 23:40:19 -04:00
Martin Povišer 4fceeb3b32 ast/simplify: Use clone_at_zero() for "at_zero" evaluations
The correct way of using the 'at_zero' regime of simplify is to perform
the simplification on a cloned AST subtree, otherwise the "at_zero"
evaluation seeps into the main tree.

Move the effect of the 'at_zero' flag to the cloning itself, so that
the simplify flag can be retired. We assume we can rely on id2ast in
the new clone method.
2023-07-20 23:40:19 -04:00
Martin Povišer 77d4b5230e ast: Move to a new helper method to print input errors
It's a repeating pattern to print an error message tied to an AST
node. Start using an 'input_error' helper for that. Among other
things this is beneficial in shortening the print lines, which tend
to be long.
2023-07-20 23:40:19 -04:00
Martin Povišer 1ac1b2eed5 ast/simplify: Factor out helper to determine range width 2023-07-20 23:40:19 -04:00
Dag Lem cff53d6d87 Corrected handling of nested typedefs of struct/union
This also corrects shadowing of constants in struct/union types.
2023-07-20 23:39:44 -04:00
Dag Lem ad437c178d Handling of attributes for struct / union variables
(* nowrshmsk *) on a struct / union variable now affects dynamic
bit slice assignments to members of the struct / union.

(* nowrshmsk *) can in some cases yield significant resource savings; the
combination of pipeline shifting and indexed writes is an example of this.

Constructs similar to the one below can benefit from (* nowrshmsk *), and
in addition it is no longer necessary to split out the shift assignments
on separate lines in order to avoid the error message "ERROR: incompatible
mix of lookahead and non-lookahead IDs in LHS expression."

    always_ff @(posedge clk) begin
        if (rotate) begin
            { v5, v4, v3, v2, v1, v0 } <= { v4, v3, v2, v1, v0, v5 };

            if (res) begin
                v0.bytes <= '0;
            end else if (w) begin
                v0.bytes[addr] <= data;
            end
        end
    end
2023-05-03 18:44:07 +02:00
Dag Lem 0d3423ddea Index struct/union members within corresponding wire chunks
This guards against access to bits outside of struct/union
members via dynamic indexing.
2023-03-05 14:54:17 +01:00
Dag Lem c1e12877f0 Support for data and array queries on struct/union item expressions
For now, $bits, $left, $right, $low, $high, and $size are supported.
2023-02-15 11:44:24 +01:00
Jannis Harder 53bda9de54
Merge pull request #3661 from daglem/struct-array-range-offset
Handle range offsets in packed arrays within packed structs
2023-02-15 11:21:56 +01:00
Dag Lem 615adc4253
Resolve package types in interfaces (#3658)
* Resolve package types in interfaces
* Added test for resolving of package types in interfaces
2023-02-12 18:25:39 -05:00
Dag Lem 777c589e85 Handle range offsets in packed arrays within packed structs
This brings the metadata for packed arrays in packed structs
in line with the metadata for unpacked arrays, and correctly
handles the case when both lsb and msb in an address range are
non-zero.
2023-02-05 17:09:51 +01:00
Dag Lem db13c6df2b
Handle struct members of union type (#3641) 2023-01-29 13:45:45 -05:00
Miodrag Milanovic 6574553189 Fixes for some of clang scan-build detected issues 2023-01-17 12:58:08 +01:00
Jannis Harder 3ebc50dee4
Merge pull request #3467 from jix/fix_cellarray_simplify
simplify: Do not recursively simplify AST_CELL within AST_CELLARRAY
2022-12-19 16:05:13 +01:00
Jannis Harder dd8b412833 simplify: Do not recursively simplify AST_CELL within AST_CELLARRAY
Otherwise the AST_CELL simplification uses the wrong celltype before the
AST_CELLARRAY simplification has a chance to unroll it and change it to
the $array celltype.
2022-12-07 18:21:36 +01:00
Dag Lem 22090011ab Made make_struct_member_range side-effect-free again 2022-12-04 06:54:22 +01:00
Dag Lem f94eec952f Support for packed multidimensional arrays within packed structs 2022-12-03 19:54:47 +01:00
Jannis Harder 4a2b7287ca
Merge pull request #3551 from daglem/struct-array-swapped-range
Support for arrays with swapped ranges within structs
2022-12-01 00:58:32 +01:00
Dag Lem 64f88eb7f1 Added asserts for current limitation of array dimensions in packed structs 2022-11-30 23:32:41 +01:00
Dag Lem 15c8e74329 Check for all cases of currently unsupported array dimensions in packed structs 2022-11-30 20:04:45 +01:00
Dag Lem ddb12148e7 Support for swapped ranges in second array dimension 2022-11-23 16:31:08 +01:00
Dag Lem bab88630c2 Support for arrays with swapped ranges within structs
This also corrects the implementation of C type arrays within structs.

Fixes #3550
2022-11-12 08:48:25 +01:00
Zachary Snow 71e7e09092 verilog: Support module-scoped task/function calls
This is primarily intended to enable the standard-permitted use of
module-scoped identifiers to refer to tasks and non-constant functions.
As a side-effect, this also adds support for the non-standard use of
module-scoped identifiers referring to constant functions, a feature
that is supported in some other tools, including Iverilog.
2022-10-29 15:14:11 -04:00
Miodrag Milanovic 6c65ca4e50 Encode filename unprintable chars 2022-08-08 16:13:33 +02:00
Jannis Harder 4bfaaea0d5 verilog: fix size and signedness of array querying functions
genrtlil.cc and simplify.cc had inconsistent and slightly broken
handling of signedness for array querying functions. These functions are
defined to return a signed result. Simplify always produced an unsigned
and genrtlil always a signed 32-bit result ignoring the context.

Includes tests for the the relvant edge cases for context dependent
conversions.
2022-05-30 09:11:31 -04:00
Jannis Harder b75fa62e9b verilog: fix $past's signedness 2022-05-25 16:32:08 -04:00
Jannis Harder cffec1f95f verilog: fix signedness when removing unreachable cases 2022-05-24 23:03:31 -04:00
Zachary Snow bf15dbd0f7 sv: fix always_comb auto nosync for nested and function blocks 2022-04-05 14:43:48 -06:00
Kamil Rakoczy 68c67c40ec
Fix access to whole sub-structs (#3086)
* Add support for accessing whole struct
* Update tests

Signed-off-by: Kamil Rakoczy <krakoczy@antmicro.com>
2022-02-14 14:34:20 +01:00
Zachary Snow 15eb66b99d verilog: fix dynamic dynamic range asgn elab 2022-02-11 22:54:55 +01:00
Zachary Snow 90bb47d181 verilog: fix const func eval with upto variables 2022-02-11 21:01:51 +01:00
Zachary Snow aa35f24290 sv: auto add nosync to certain always_comb local vars
If a local variable is always assigned before it is used, then adding
nosync prevents latches from being needlessly generated.
2022-01-07 22:53:22 -07:00
Zachary Snow 7608985d2c fix width detection of array querying function in case and case item expressions
I also removed the unnecessary shadowing of `width_hint` and `sign_hint`
in the corresponding case in `simplify()`.
2021-12-17 21:22:08 -07:00
Kamil Rakoczy fdb19a5b3a
Support parameters using struct as a wiretype (#3050)
Signed-off-by: Kamil Rakoczy <krakoczy@antmicro.com>
2021-11-16 10:59:54 +01:00
Zachary Snow e833c6a418 verilog: use derived module info to elaborate cell connections
- Attempt to lookup a derived module if it potentially contains a port
  connection with elaboration ambiguities
- Mark the cell if module has not yet been derived
- This can be extended to implement automatic hierarchical port
  connections in a future change
2021-10-25 18:25:50 -07:00
Zachary Snow 6b7267b849 verilog: fix multiple AST_PREFIX scope resolution issues
- Root AST_PREFIX nodes are now subject to genblk expansion to allow
  them to refer to a locally-visible generate block
- Part selects on AST_PREFIX member leafs can now refer to generate
  block items (previously would not resolve and raise an error)
- Add source location information to AST_PREFIX nodes
2021-09-21 12:10:59 -04:00
Marcelina Kościelnicka 8bdc019730 verilog: Emit $meminit_v2 cell.
Fixes #2447.
2021-07-28 23:18:38 +02:00
Zachary Snow a9c8ca21d5 sv: fix two struct access bugs
- preserve signedness of struct members
- fix initial width detection of struct members (e.g., in case expressions)
2021-07-15 11:57:20 -04:00
Zachary Snow 4446cfa524 sv: fix a few struct and enum memory leaks 2021-07-06 12:15:08 -04:00
Xiretza 62a42c317c ast: delete wires and localparams after finishing const evaluation 2021-06-14 13:56:51 -04:00
Xiretza 091295a5a5 verilog: fix leaking ASTNodes 2021-06-14 13:56:51 -04:00
Claire Xen 55e8f5061a
Merge pull request #2817 from YosysHQ/claire/fixemails
Fixing old e-mail addresses and deadnames
2021-06-09 13:22:52 +02:00
Zachary Snow 2e697f5655 verilog: check for module scope identifiers during width detection
The recent fix for case expression width detection causes the width of
the expressions to be queried before they are simplified. Because the
logic supporting module scope identifiers only existed in simplify,
looking them up would fail during width detection. This moves the logic
to a common helper used in both simplify() and detectSignWidthWorker().
2021-06-08 15:03:16 -04:00
Zachary Snow c79fbfe0a1 mem2reg: tolerate out of bounds constant accesses
This brings the mem2reg behavior in line with the nomem2reg behavior.
2021-06-08 15:02:57 -04:00
Claire Xenia Wolf 72787f52fc Fixing old e-mail addresses and deadnames
s/((Claire|Xen|Xenia|Clifford)\s+)+(Wolf|Xen)\s+<(claire|clifford)@(symbioticeda.com|clifford.at|yosyshq.com)>/Claire Xenia Wolf <claire@yosyshq.com>/gi;
s/((Nina|Nak|N\.)\s+)+Engelhardt\s+<nak@(symbioticeda.com|yosyshq.com)>/N. Engelhardt <nak@yosyshq.com>/gi;
s/((David)\s+)+Shah\s+<(dave|david)@(symbioticeda.com|yosyshq.com|ds0.me)>/David Shah <dave@ds0.me>/gi;
s/((Miodrag)\s+)+Milanovic\s+<(miodrag|micko)@(symbioticeda.com|yosyshq.com)>/Miodrag Milanovic <micko@yosyshq.com>/gi;
s,https?://www.clifford.at/yosys/,http://yosyshq.net/yosys/,g;
2021-06-08 00:39:36 +02:00
Zachary Snow 8cfed1a979 sv: support tasks and functions within packages 2021-06-01 13:17:41 -04:00
Zachary Snow 0795b3ec07 verilog: fix case expression sign and width handling
- The case expression and case item expressions are extended to the
  maximum width among them, and are only interpreted as signed if all of
  them are signed
- Add overall width and sign detection for AST_CASE
- Add sign argument to genWidthRTLIL helper
- Coverage for both const and non-const case statements
2021-05-25 16:16:46 -04:00
Xiretza 092e923330 verilog: fix buf/not primitives with multiple outputs
From IEEE1364-2005, section 7.3 buf and not gates:

> These two logic gates shall have one input and one or more outputs.
> The last terminal in the terminal list shall connect to the input of the
> logic gate, and the other terminals shall connect to the outputs of
> the logic gate.

yosys does not follow this and instead interprets the first argument as
the output, the second as the input and ignores the rest.
2021-03-17 11:44:03 -04:00
Zachary Snow 4f187d53c5 verilog: support module scope identifiers in parametric modules 2021-03-16 11:01:30 -04:00
Zachary Snow 640b9927fa sv: allow globals in one file to depend on globals in another
This defers the simplification of globals so that globals in one file
may depend on globals in other files. Adds a simplify() call downstream
because globals are appended at the end.
2021-03-12 11:22:41 -05:00
Marcelina Kościelnicka 89c74ffd71 verilog: Use proc memory writes in the frontend. 2021-03-08 20:16:29 +01:00
Zachary Snow b1a8e73a60 sv: fix some edge cases for unbased unsized literals
- Fix explicit size cast of unbased unsized literals
- Fix unbased unsized literal bound directly to port
- Output `is_unsized` flag in `dumpAst`
2021-03-06 15:20:34 -05:00
Michael Singer 04b41ed04a Implement $countones, $isunknown and $onehot{,0} 2021-02-26 12:28:58 -05:00
Michael Singer 8434ba5a3b Implement $countbits function 2021-02-26 12:28:58 -05:00
Zachary Snow 22bed38540 Extend simplify() recursion warning 2021-02-26 12:11:23 -05:00
Marcelina Kościelnicka f4f471f342 frontend: Make helper functions for printing locations. 2021-02-23 23:51:52 +01:00
whitequark ad2960adb7
Merge pull request #2594 from zachjs/func-arg-width
verilog: fix sizing of constant args for tasks/functions
2021-02-23 21:46:16 +00:00
Zachary Snow b6af90fe20 verilog: fix sizing of constant args for tasks/functions
- Simplify synthetic localparams for normal calls to update their width
    - This step was inadvertently removed alongside `added_mod_children`
- Support redeclaration of constant function arguments
    - `eval_const_function` never correctly handled this, but the issue
      was not exposed in the existing tests until the recent change to
      always attempt constant function evaluation when all-const args
      are used
- Check asserts in const_arg_loop and const_func tests
- Add coverage for width mismatch error cases
2021-02-21 15:44:43 -05:00
Zachary Snow 8de2e863af verilog: support recursive functions using ternary expressions
This adds a mechanism for marking certain portions of elaboration as
occurring within unevaluated ternary branches. To enable elaboration of
the overall ternary, this also adds width detection for these
unelaborated function calls.
2021-02-12 14:43:42 -05:00
Zachary Snow b93b6f4285 verilog: refactored constant function evaluation
Elaboration now attempts constant evaluation of any function call with
only constant arguments, regardless of the context or contents of the
function. This removes the concept of "recommended constant evaluation"
which previously applied to functions with `for` loops or which were
(sometimes erroneously) identified as recursive. Any function call in a
constant context (e.g., `localparam`) or which contains a constant-only
procedural construct (`while` or `repeat`) in its body will fail as
before if constant evaluation does not succeed.
2021-02-04 10:18:27 -05:00
Zachary Snow fe74b0cd95 verilog: significant block scoping improvements
This change set contains a number of bug fixes and improvements related to
scoping and resolution in generate and procedural blocks. While many of the
frontend changes are interdependent, it may be possible bring the techmap
changes in under a separate PR.

Declarations within unnamed generate blocks previously encountered issues
because the data declarations were left un-prefixed, breaking proper scoping.
The LRM outlines behavior for generating names for unnamed generate blocks. The
original goal was to add this implicit labelling, but doing so exposed a number
of issues downstream. Additional testing highlighted other closely related scope
resolution issues, which have been fixed. This change also adds support for
block item declarations within unnamed blocks in SystemVerilog mode.

1. Unlabled generate blocks are now implicitly named according to the LRM in
   `label_genblks`, which is invoked at the beginning of module elaboration
2. The Verilog parser no longer wraps explicitly named generate blocks in a
   synthetic unnamed generate block to avoid creating extra hierarchy levels
   where they should not exist
3. The techmap phase now allows special control identifiers to be used outside
   of the topmost scope, which is necessary because such wires and cells often
   appear in unlabeled generate blocks, which now prefix the declarations within
4. Some techlibs required modifications because they relied on the previous
   invalid scope resolution behavior
5. `expand_genblock` has been simplified, now only expanding the outermost
   scope, completely deferring the inspection and elaboration of nested scopes;
   names are now resolved by looking in the innermost scope and stepping outward
6. Loop variables now always become localparams during unrolling, allowing them
   to be resolved and shadowed like any other identifier
7. Identifiers in synthetic function call scopes are now prefixed and resolved
   in largely the same manner as other blocks
     before: `$func$\func_01$tests/simple/scopes.blk.v:60$5$\blk\x`
      after: `\func_01$func$tests/simple/scopes.v:60$5.blk.x`
8. Support identifiers referencing a local generate scope nested more
   than 1 level deep, i.e. `B.C.x` while within generate scope `A`, or using a
   prefix of a current or parent scope, i.e. `B.C.D.x` while in `A.B`, `A.B.C`,
   or `A.B.C.D`
9. Variables can now be declared within unnamed blocks in SystemVerilog mode

Addresses the following issues: 656, 2423, 2493
2021-01-31 09:42:09 -05:00
Kamil Rakoczy 61501e3266 Fix input/output attributes when resolving typedef of wire
Signed-off-by: Kamil Rakoczy <krakoczy@antmicro.com>
2021-01-18 17:31:22 +01:00
Zachary Snow 2085d9a55d verilog: improved support for recursive functions 2020-12-31 18:33:59 -07:00
Zachary Snow 750831e3e0 Fix elaboration of whole memory words used as indices 2020-12-26 21:47:38 -07:00
Zachary Snow 1419c8761c Fix constants bound to redeclared function args
The changes in #2476 ensured that function inputs like `input x;`
retained their single-bit size when instantiated with a constant
argument and turned into a localparam. That change did not handle the
possibility for an input to be redeclared later on with an explicit
width, such as `integer x;`.
2020-12-26 08:48:01 -07:00
whitequark 8ef6b77dc3
Merge pull request #2476 from zachjs/const-arg-width
Fix constants bound to single bit arguments (fixes #2383)
2020-12-23 23:15:30 +00:00
Zachary Snow 8206546c45 Fix constants bound to single bit arguments (fixes #2383) 2020-12-22 17:01:03 -07:00
Zachary Snow 186d6df4c3 Allow constant function calls in constant function arguments 2020-12-07 13:53:27 -07:00
clairexen 7e2fc2eaeb
Merge pull request #2378 from udif/pr_dollar_high_low
Added $high(), $low(), $left(), $right()
2020-10-01 18:17:36 +02:00
clairexen 9e937961dc
Merge pull request #2330 from antmicro/arrays-fix-multirange-access
Fix unsupported subarray access detection
2020-09-17 18:21:53 +02:00
Udi Finkelstein 7ed0e23e19 We can now handle array slices (e.g. $size(x[1]) etc. ) 2020-09-17 00:55:17 +03:00
Udi Finkelstein 6de7ba02e3 Fixed comments, removed debug message 2020-09-16 10:57:06 +03:00
Udi Finkelstein b548722bee Added $high(), $low(), $left(), $right() 2020-09-15 20:49:52 +03:00
clairexen a10893072b
Merge pull request #2352 from zachjs/const-func-localparam
Allow localparams in constant functions
2020-09-01 17:31:48 +02:00
clairexen c1a6097376
Merge pull request #2366 from zachjs/library-format
Simple support for %l format specifier
2020-09-01 17:30:36 +02:00
clairexen 3e1840d036
Merge pull request #2353 from zachjs/top-scope
Module name scope support
2020-09-01 17:30:09 +02:00
Zachary Snow c7ceed3fd3 Simple support for %l format specifier
Yosys doesn't support libraries, so this provides the same behavior as
%m, as some other tools have opted to do.
2020-08-29 13:33:31 -04:00
Zachary Snow ecc5c23b4d Fix constant args used with function ports split across declarations 2020-08-29 13:31:02 -04:00
Zachary Snow 6127f22788 Module name scope support 2020-08-20 20:15:08 -04:00
Zachary Snow 74abc3bbfd Allow localparams in constant functions 2020-08-20 20:10:24 -04:00
clairexen 87b9ee330d
Merge pull request #2122 from PeterCrozier/struct_array2
Support 2D bit arrays in structures. Optimise array indexing.
2020-08-19 17:58:37 +02:00
clairexen 22765ef0a5
Merge pull request #2339 from zachjs/display-format-0s
Allow %0s $display format specifier
2020-08-18 17:39:01 +02:00