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rtlil: publish signorm fanout
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@@ -2144,6 +2144,7 @@ public:
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int next_timestamp();
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std::vector<Cell *> dirty_cells(int starting_from);
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const pool<PortBit> &fanout(SigBit bit);
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const dict<SigBit, pool<PortBit>> &signorm_fanout() const;
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template<typename T> void rewrite_sigspecs(T &functor);
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template<typename T> void rewrite_sigspecs2(T &functor);
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@@ -498,6 +498,11 @@ const pool<RTLIL::PortBit> &RTLIL::Module::fanout(SigBit bit) {
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return found->second;
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}
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const dict<RTLIL::SigBit, pool<RTLIL::PortBit>> &RTLIL::Module::signorm_fanout() const {
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log_assert(sig_norm_index != nullptr);
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return sig_norm_index->fanout;
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}
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void RTLIL::Module::remove(RTLIL::Cell *cell)
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{
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while (!cell->connections_.empty())
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