Added comments explaining the MUX network repair Idea to see if there's a combinational circuit out of the input values which can serve as the enable signal

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AdvaySingh1 2026-02-12 12:49:15 -08:00
parent 514c01efd2
commit e4734e6ca9
1 changed files with 24 additions and 1 deletions

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@ -269,4 +269,27 @@ bool input_set_is_enable_exact(const pool<SigBit> &input_set, SigSpec sig_d, Sig
Setting up the SAT condition:
- Need to have the equation for Q, need to have the equation for D
need to XOR those equations, need to XOR that equation with the new
one. Need to make sure that that's never SAT.
one. Need to make sure that that's never SAT.
Ok so I have this idea:
I'm doing to take the input variables, universally quantize them and also take D and Q and universilly quantise them
Then I have this formula SAT((D^Q) !^ MUX))
Where the MUX has (for the select inputs the input values, and then has random variables d_0 to D_2^n when there's n inputs.
SAT returns the combination of the values for d which make this work.
But in this case, how can I go from determining the values of the Ds to determine the gates and converting that to combinational logic? And also, how can I Universially Quantize the other values?